Searched refs:getRegisterInfo (Results 1 - 25 of 190) sorted by relevance

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/freebsd-10.1-release/contrib/llvm/lib/Target/ARM/
H A DARMInstrInfo.h37 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
41 const ARMRegisterInfo &getRegisterInfo() const { return RI; } function in class:llvm::ARMInstrInfo
H A DARMTargetMachine.h82 virtual const ARMRegisterInfo *getRegisterInfo() const { function in class:llvm::ARMTargetMachine
83 return &InstrInfo.getRegisterInfo();
121 virtual const ARMBaseRegisterInfo *getRegisterInfo() const { function in class:llvm::ThumbTargetMachine
122 return &InstrInfo->getRegisterInfo();
H A DThumb1InstrInfo.h36 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
40 const Thumb1RegisterInfo &getRegisterInfo() const { return RI; } function in class:llvm::Thumb1InstrInfo
H A DThumb2InstrInfo.h60 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
64 const Thumb2RegisterInfo &getRegisterInfo() const { return RI; } function in class:llvm::Thumb2InstrInfo
H A DARMCodeEmitter.cpp259 unsigned Reg = II->getRegisterInfo().getEncodingValue(MO.getReg());
301 unsigned Reg = II->getRegisterInfo().getEncodingValue(MO.getReg());
455 return II->getRegisterInfo().getEncodingValue(MO.getReg());
791 Binary |= II->getRegisterInfo().getEncodingValue(ARM::PC) << ARMII::RegRnShift;
978 return Binary | (II->getRegisterInfo().getEncodingValue(Rs) << ARMII::RegRsShift);
1029 Binary |= (II->getRegisterInfo().getEncodingValue(ImplicitRd) << ARMII::RegRdShift);
1079 Binary |= (II->getRegisterInfo().getEncodingValue(ImplicitRn) << ARMII::RegRnShift);
1096 emitWordLE(Binary | II->getRegisterInfo().getEncodingValue(MO.getReg()));
1139 Binary |= (II->getRegisterInfo().getEncodingValue(ImplicitRd) << ARMII::RegRdShift);
1146 Binary |= (II->getRegisterInfo()
[all...]
/freebsd-10.1-release/contrib/llvm/lib/Target/AArch64/
H A DAArch64TargetMachine.h61 const TargetRegisterInfo *getRegisterInfo() const { function in class:llvm::AArch64TargetMachine
62 return &InstrInfo.getRegisterInfo();
/freebsd-10.1-release/contrib/llvm/lib/Target/MSP430/
H A DMSP430TargetMachine.h53 virtual const TargetRegisterInfo *getRegisterInfo() const { function in class:llvm::MSP430TargetMachine
54 return &InstrInfo.getRegisterInfo();
H A DMSP430InstrInfo.h49 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
53 virtual const TargetRegisterInfo &getRegisterInfo() const { return RI; } function in class:llvm::MSP430InstrInfo
/freebsd-10.1-release/contrib/llvm/lib/Target/XCore/
H A DXCoreTargetMachine.h53 virtual const TargetRegisterInfo *getRegisterInfo() const { function in class:llvm::XCoreTargetMachine
54 return &InstrInfo.getRegisterInfo();
H A DXCoreInstrInfo.h31 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
35 virtual const TargetRegisterInfo &getRegisterInfo() const { return RI; } function in class:llvm::XCoreInstrInfo
/freebsd-10.1-release/contrib/llvm/lib/CodeGen/
H A DTargetFrameLoweringImpl.cpp37 const TargetRegisterInfo *RI = MF.getTarget().getRegisterInfo();
H A DLLVMTargetMachine.cpp66 AsmInfo = TheTarget.createMCAsmInfo(*getRegisterInfo(), TargetTriple);
115 new MachineModuleInfo(*TM->getMCAsmInfo(), *TM->getRegisterInfo(),
165 const MCRegisterInfo &MRI = *getRegisterInfo();
269 const MCRegisterInfo &MRI = *getRegisterInfo();
H A DLiveStackAnalysis.cpp51 TRI = MF.getTarget().getRegisterInfo();
/freebsd-10.1-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonTargetMachine.h50 virtual const HexagonRegisterInfo *getRegisterInfo() const { function in class:llvm::HexagonTargetMachine
51 return &InstrInfo.getRegisterInfo();
/freebsd-10.1-release/contrib/llvm/lib/Target/R600/
H A DAMDGPUTargetMachine.h53 virtual const AMDGPURegisterInfo *getRegisterInfo() const { function in class:llvm::AMDGPUTargetMachine
54 return &InstrInfo->getRegisterInfo();
/freebsd-10.1-release/contrib/llvm/lib/Target/SystemZ/
H A DSystemZTargetMachine.h57 virtual const SystemZRegisterInfo *getRegisterInfo() const LLVM_OVERRIDE {
58 return &InstrInfo.getRegisterInfo();
/freebsd-10.1-release/contrib/llvm/lib/Target/NVPTX/
H A DNVPTXTargetMachine.h61 virtual const NVPTXRegisterInfo *getRegisterInfo() const { function in class:llvm::NVPTXTargetMachine
62 return &(InstrInfo.getRegisterInfo());
H A DNVPTXInstrInfo.h33 virtual const NVPTXRegisterInfo &getRegisterInfo() const { return RegInfo; } function in class:llvm::NVPTXInstrInfo
/freebsd-10.1-release/contrib/llvm/lib/Target/PowerPC/
H A DPPCTargetMachine.h57 virtual const PPCRegisterInfo *getRegisterInfo() const { function in class:llvm::PPCTargetMachine
58 return &InstrInfo.getRegisterInfo();
/freebsd-10.1-release/contrib/llvm/lib/Target/Sparc/
H A DSparcTargetMachine.h48 virtual const SparcRegisterInfo *getRegisterInfo() const { function in class:llvm::SparcTargetMachine
49 return &InstrInfo.getRegisterInfo();
H A DSparcInstrInfo.h44 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
48 virtual const SparcRegisterInfo &getRegisterInfo() const { return RI; } function in class:llvm::SparcInstrInfo
/freebsd-10.1-release/contrib/llvm/lib/Target/Mips/
H A DMipsTargetMachine.h77 virtual const MipsRegisterInfo *getRegisterInfo() const { function in class:llvm::MipsTargetMachine
78 return &InstrInfo->getRegisterInfo();
H A DMipsFrameLowering.cpp104 const TargetRegisterInfo &TRI = *MF.getTarget().getRegisterInfo();
/freebsd-10.1-release/contrib/llvm/lib/Target/X86/
H A DX86TargetMachine.h60 virtual const X86RegisterInfo *getRegisterInfo() const { function in class:llvm::X86TargetMachine
61 return &getInstrInfo()->getRegisterInfo();
/freebsd-10.1-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp422 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg);
451 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
745 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg());
746 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg());
762 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC.
844 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC.
880 unsigned Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
963 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
964 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg());
998 unsigned Rn = CTX.getRegisterInfo()
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