Searched refs:Src0Reg (Results 1 - 5 of 5) sorted by relevance
| /freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | R600InstrInfo.h | 245 unsigned Src0Reg,
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| H A D | R600InstrInfo.cpp | 1179 unsigned Src0Reg,
1192 .addReg(Src0Reg) // $src0
1175 buildDefaultInstruction(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned Opcode, unsigned DstReg, unsigned Src0Reg, unsigned Src1Reg) const argument
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| H A D | SIInstrInfo.cpp | 1908 unsigned Src0Reg = Src0.getReg();
1920 Src1.ChangeToRegister(Src0Reg, false, false, Src0Kill);
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| /freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 4449 unsigned Src0Reg = getRegForValue(I->getOperand(0)); local
4450 if (!Src0Reg)
4461 unsigned QuotReg = fastEmitInst_rr(DivOpc, RC, Src0Reg, /*IsKill=*/false,
4467 Src1Reg, Src1IsKill, Src0Reg,
4513 unsigned Src0Reg = getRegForValue(Src0); local
4514 if (!Src0Reg)
4519 emitLSL_ri(VT, SrcVT, Src0Reg, Src0IsKill, ShiftVal, IsZExt);
4527 unsigned Src0Reg = getRegForValue(I->getOperand(0)); local
4528 if (!Src0Reg)
4537 unsigned ResultReg = emitMul_rr(VT, Src0Reg, Src0IsKil
4728 unsigned Src0Reg = getRegForValue(I->getOperand(0)); local
[all...] |
| /freebsd-11.0-release/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 1671 unsigned Src0Reg = getRegForValue(I->getOperand(0)); local
1673 if (!Src0Reg || !Src1Reg)
1676 emitInst(DivOpc).addReg(Src0Reg).addReg(Src1Reg);
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