/freebsd-10.2-release/contrib/llvm/lib/Target/R600/ |
H A D | SITypeRewriter.cpp | 14 /// v16i8 => i128 39 Type *i128; member in class:__anon2606::SITypeRewriter 60 i128 = Type::getIntNTy(M.getContext(), 128); 111 Args.push_back(Builder.CreateBitCast(Arg, i128)); 112 Types.push_back(i128); 114 Name = Name + ".i128"; 148 if (I.getDestTy() != i128) { 153 if (Op->getSrcTy() == i128) {
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H A D | SIISelLowering.cpp | 49 addRegisterClass(MVT::i128, &AMDGPU::SReg_128RegClass); 84 setOperationAction(ISD::BITCAST, MVT::i128, Legal); 103 setOperationAction(ISD::STORE, MVT::i128, Custom); 135 setTruncStoreAction(MVT::i128, MVT::i64, Expand); 727 if (Op.getValueType() == MVT::i128) { 733 return DAG.getNode(ISD::BUILD_PAIR, SDLoc(Op), MVT::i128, 807 } else if (VT == MVT::i128) { 1382 SDValue(DAG.getMachineNode(AMDGPU::SI_ADDR64_RSRC, DL, MVT::i128,
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H A D | AMDGPUISelDAGToDAG.cpp | 296 if (N->getValueType(0) == MVT::i128) {
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/freebsd-10.2-release/contrib/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 461 if (RetVT == MVT::i128) 472 if (RetVT == MVT::i128) 479 if (RetVT == MVT::i128) 486 if (RetVT == MVT::i128) 493 if (RetVT == MVT::i128) 511 if (RetVT == MVT::i128) 522 if (RetVT == MVT::i128) 529 if (RetVT == MVT::i128) 536 if (RetVT == MVT::i128) 543 if (RetVT == MVT::i128) [all...] |
/freebsd-10.2-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | ValueTypes.h | 48 i128 = 6, // This is a 128 bit integer value enumerator in enum:llvm::MVT::SimpleValueType 51 LAST_INTEGER_VALUETYPE = i128, 407 case i128: 496 return MVT::i128;
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/freebsd-10.2-release/contrib/llvm/lib/IR/ |
H A D | ValueTypes.cpp | 120 case MVT::i128: return "i128"; 191 case MVT::i128: return IntegerType::get(Context, 128);
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/freebsd-10.2-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 1191 case MVT::i128:LC = RTLIB::SYNC_LOCK_TEST_AND_SET_16;break; 1201 case MVT::i128:LC = RTLIB::SYNC_VAL_COMPARE_AND_SWAP_16;break; 1211 case MVT::i128:LC = RTLIB::SYNC_FETCH_AND_ADD_16;break; 1221 case MVT::i128:LC = RTLIB::SYNC_FETCH_AND_SUB_16;break; 1231 case MVT::i128:LC = RTLIB::SYNC_FETCH_AND_AND_16;break; 1241 case MVT::i128:LC = RTLIB::SYNC_FETCH_AND_OR_16;break; 1251 case MVT::i128:LC = RTLIB::SYNC_FETCH_AND_XOR_16;break; 1261 case MVT::i128:LC = RTLIB::SYNC_FETCH_AND_NAND_16;break; 2002 else if (VT == MVT::i128) 2066 else if (VT == MVT::i128) [all...] |
H A D | LegalizeDAG.cpp | 2023 case MVT::i128: LC = Call_I128; break; 2038 case MVT::i128: LC= isSigned ? RTLIB::SDIVREM_I128:RTLIB::UDIVREM_I128; break; 2085 case MVT::i128: LC= isSigned ? RTLIB::SDIVREM_I128:RTLIB::UDIVREM_I128; break; 2686 case MVT::i128:LC = RTLIB::SYNC_LOCK_TEST_AND_SET_16;break; 2696 case MVT::i128:LC = RTLIB::SYNC_VAL_COMPARE_AND_SWAP_16;break; 2706 case MVT::i128:LC = RTLIB::SYNC_FETCH_AND_ADD_16;break; 2716 case MVT::i128:LC = RTLIB::SYNC_FETCH_AND_SUB_16;break; 2726 case MVT::i128:LC = RTLIB::SYNC_FETCH_AND_AND_16;break; 2736 case MVT::i128:LC = RTLIB::SYNC_FETCH_AND_OR_16;break; 2746 case MVT::i128 [all...] |
H A D | LegalizeFloatTypes.cpp | 1203 } else if (SrcVT.bitsLE(MVT::i128)) { 1204 Src = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i128, Src); 1235 case MVT::i128:
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/freebsd-10.2-release/contrib/llvm/utils/TableGen/ |
H A D | CodeGenTarget.cpp | 59 case MVT::i128: return "MVT::i128";
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/freebsd-10.2-release/contrib/llvm/tools/clang/lib/AST/ |
H A D | StmtPrinter.cpp | 828 case BuiltinType::Int128: OS << "i128"; break;
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/freebsd-10.2-release/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 253 setOperationAction(ISD::FP_TO_SINT, MVT::i128, Custom); 256 setOperationAction(ISD::FP_TO_UINT, MVT::i128, Custom); 259 setOperationAction(ISD::SINT_TO_FP, MVT::i128, Custom); 262 setOperationAction(ISD::UINT_TO_FP, MVT::i128, Custom); 1036 // backtrack: if (for example) an i128 gets put on the stack, no subsequent
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/freebsd-10.2-release/contrib/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 1037 // Full register, just bitconvert into i128 -- We will lower this into 1040 IReg, MVT::i128, CCValAssign::BCvt); 1117 // fixupVariableFloatArgs() may create bitcasts from f128 to i128. But 1118 // SPARC does not support i128 natively. Lower it into two i64, see below. 1120 || VA.getLocVT() != MVT::i128) 1127 && VA.getLocVT() == MVT::i128) { 2736 EVT WideVT = MVT::i128;
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/freebsd-10.2-release/contrib/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 477 else if (VT == MVT::i128) 484 else if (VT == MVT::i128) 508 if (VT == MVT::i128)
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/freebsd-10.2-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 1800 else if (VT == MVT::i128) 1822 else if (VT == MVT::i128)
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/freebsd-10.2-release/contrib/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 595 setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i128, Custom); 13608 assert((T == MVT::i64 || T == MVT::i128) && "can only expand cmpxchg pair"); 13609 bool Regs64bit = T == MVT::i128; 13950 assert(Ty1->getPrimitiveSizeInBits() <= 64 && "i128 is probably not a noop");
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