Searched refs:CodeGenProcModel (Results 1 - 3 of 3) sorted by relevance
/freebsd-10.0-release/contrib/llvm/utils/TableGen/ |
H A D | CodeGenSchedule.h | 174 struct CodeGenProcModel { struct in namespace:llvm 199 CodeGenProcModel(unsigned Idx, const std::string &Name, Record *MDef, function in struct:llvm::CodeGenProcModel 227 std::vector<CodeGenProcModel> ProcModels; 229 // Map Processor's MachineModel or ProcItin to a CodeGenProcModel index. 262 const CodeGenProcModel &getModelForProc(Record *ProcDef) const { 269 const CodeGenProcModel &getProcModel(Record *ModelDef) const { 276 typedef std::vector<CodeGenProcModel>::const_iterator ProcIter; 339 const CodeGenProcModel &ProcModel) const; 351 const CodeGenProcModel &PM) const; 383 bool hasSuperGroup(RecVec &SubUnits, CodeGenProcModel [all...] |
H A D | CodeGenSchedule.cpp | 100 // Instantiate a CodeGenProcModel for each SchedMachineModel with the values 103 // CodeGenProcModel instances. 122 // CodeGenProcModel::ItinDefList. (Cycle-to-cycle itineraries). This requires 133 // Populate each CodeGenProcModel's WriteResDefs, ReadAdvanceDefs, and 149 ProcModels.push_back(CodeGenProcModel(0, "NoSchedModel", 169 CodeGenProcModel(ProcModels.size(), Name, ModelKey, ItinsDef)); 176 CodeGenProcModel(ProcModels.size(), Name, 427 const CodeGenProcModel &ProcModel) const { 570 const CodeGenProcModel &ProcModel = 584 for (std::vector<CodeGenProcModel> [all...] |
H A D | SubtargetEmitter.cpp | 84 void EmitProcessorResources(const CodeGenProcModel &ProcModel, 87 const CodeGenProcModel &ProcModel); 89 const CodeGenProcModel &ProcModel); 91 const CodeGenProcModel &ProcModel); 92 void GenSchedClassTables(const CodeGenProcModel &ProcModel, 442 const CodeGenProcModel &ProcModel = *PI; 622 void SubtargetEmitter::EmitProcessorResources(const CodeGenProcModel &ProcModel, 678 const CodeGenSchedRW &SchedWrite, const CodeGenProcModel &ProcModel) { 733 const CodeGenProcModel &ProcModel) { 788 const CodeGenProcModel [all...] |
Completed in 110 milliseconds