Searched refs:aligned (Results 1 - 25 of 57) sorted by relevance

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/barrelfish-master/lib/crt/
H A Dcrtend.c23 __attribute__ ((used, section(".ctors"), aligned(sizeof(CDtor))))
H A Dcrtbegin.c24 __attribute__ ((unused, section(".ctors"), aligned(sizeof(CDtor))))
/barrelfish-master/include/spawndomain/
H A Dspawndomain.h27 struct cnoderef rootcn __attribute__ ((aligned(4)));
28 struct cnoderef taskcn __attribute__ ((aligned(4)));
29 struct cnoderef segcn __attribute__ ((aligned(4)));
30 struct cnoderef pagecn __attribute__ ((aligned(4)));
31 struct capref rootcn_cap __attribute__ ((aligned(4)));
32 struct capref taskcn_cap __attribute__ ((aligned(4)));
33 struct capref pagecn_cap __attribute__ ((aligned(4)));
34 struct capref dispframe __attribute__ ((aligned(4)));
35 struct capref dcb __attribute__ ((aligned(4)));
36 struct capref argspg __attribute__ ((aligned(
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/barrelfish-master/include/barrelfish/
H A Ddispatcher.h38 uintptr_t trap_stack[DISPATCHER_STACK_WORDS] __attribute__ ((aligned (16)));
40 uintptr_t stack[DISPATCHER_STACK_WORDS] __attribute__ ((aligned (16)));
/barrelfish-master/include/target/x86_32/barrelfish_kpi/
H A Dregisters_target.h37 // Should be aligned at 16-byte boundary, according to Intel
40 uint8_t registers[512 + 16] __attribute__ ((aligned (16)));
/barrelfish-master/usr/bench/bomp_progress/
H A Dcpu_bound.c23 } __attribute__ ((aligned (64)));
H A Dsync.c31 } __attribute__ ((aligned (64)));
/barrelfish-master/kernel/arch/armv7/
H A Dinit.c50 __attribute__((aligned(8)));
101 char abt_stack[EXCEPTION_MODE_STACK_BYTES] __attribute__((aligned(8)));
102 char irq_stack[EXCEPTION_MODE_STACK_BYTES] __attribute__((aligned(8)));
103 char fiq_stack[EXCEPTION_MODE_STACK_BYTES] __attribute__((aligned(8)));
104 char undef_stack[EXCEPTION_MODE_STACK_BYTES] __attribute__((aligned(8)));
105 char svc_stack[EXCEPTION_MODE_STACK_BYTES] __attribute__((aligned(8)));
H A Dpaging_init.c24 __attribute__((aligned(ARM_L1_ALIGN), section(".boot.tables")));
26 __attribute__((aligned(ARM_L1_ALIGN), section(".boot.tables")));
28 __attribute__((aligned(ARM_L2_ALIGN), section(".boot.tables")));
112 * Make sure our page tables are correctly aligned in memory
/barrelfish-master/kernel/arch/k1om/
H A Dinit.c77 static struct task_state_segment tss __attribute__ ((aligned (4)));
86 union segment_descriptor gdt[] __attribute__ ((aligned (4))) = {
197 __attribute__ ((aligned(BASE_PAGE_SIZE)));
203 __attribute__ ((aligned(BASE_PAGE_SIZE))),
204 boot_pdpt_hi[PTABLE_SIZE] __attribute__ ((aligned(BASE_PAGE_SIZE)));
210 __attribute__ ((aligned(BASE_PAGE_SIZE)));
213 __attribute__ ((aligned(BASE_PAGE_SIZE)));
216 __attribute__ ((aligned(BASE_PAGE_SIZE)));
219 __attribute__ ((aligned(BASE_PAGE_SIZE)));
596 /* determine page-aligned physica
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/barrelfish-master/kernel/arch/x86_32/
H A Dpaging.c40 __attribute__((aligned(X86_32_BASE_PAGE_SIZE)));
46 __attribute__((aligned(X86_32_BASE_PAGE_SIZE)));
75 __attribute__((aligned(X86_32_BASE_PAGE_SIZE)));
96 __attribute__((aligned(X86_32_BASE_PAGE_SIZE)));
102 __attribute__((aligned(X86_32_BASE_PAGE_SIZE)));
134 * page-aligned by this function.
H A Dinit.c79 static struct task_state_segment tss __attribute__ ((aligned (4)));
88 static union segment_descriptor gdt[] __attribute__ ((aligned (4))) = {
193 __attribute__ ((aligned(X86_32_BASE_PAGE_SIZE)));
199 __attribute__ ((aligned(X86_32_BASE_PAGE_SIZE))),
200 boot_pdir_hi[X86_32_PTABLE_SIZE] __attribute__ ((aligned(X86_32_BASE_PAGE_SIZE)));
207 __attribute__ ((aligned(X86_32_BASE_PAGE_SIZE)));
213 __attribute__ ((aligned(X86_32_BASE_PAGE_SIZE)));
220 __attribute__ ((aligned(X86_32_BASE_PAGE_SIZE)));
630 /* determine page-aligned physical address past end of multiboot */
/barrelfish-master/kernel/arch/x86_64/
H A Dpaging.c51 __attribute__((aligned(X86_64_BASE_PAGE_SIZE)));
57 __attribute__((aligned(X86_64_BASE_PAGE_SIZE)));
63 __attribute__((aligned(X86_64_BASE_PAGE_SIZE)));
97 * page-aligned by this function.
H A Dinit.c69 static struct task_state_segment tss __attribute__ ((aligned (4)));
78 union segment_descriptor gdt[] __attribute__ ((aligned (4))) = {
189 __attribute__ ((aligned(BASE_PAGE_SIZE)));
195 __attribute__ ((aligned(BASE_PAGE_SIZE))),
196 boot_pdpt_hi[PTABLE_SIZE] __attribute__ ((aligned(BASE_PAGE_SIZE)));
202 __attribute__ ((aligned(BASE_PAGE_SIZE))),
203 boot_pdir_hi[PTABLE_SIZE] __attribute__ ((aligned(BASE_PAGE_SIZE))),
204 boot_pdir_1GB[PTABLE_SIZE] __attribute__ ((aligned(BASE_PAGE_SIZE)));
614 /* determine page-aligned physical address past end of multiboot */
/barrelfish-master/lib/devif/backends/net/mlx4/include/rdma/
H A Dib_user_mad.h161 * the same, we need the method_mask[] array to be aligned only to 4
165 typedef unsigned long __attribute__((aligned(4))) packed_ulong;
/barrelfish-master/include/mm/
H A Dslot_alloc.h44 } meta[2] __attribute__ ((aligned(4)));
/barrelfish-master/include/target/x86_64/barrelfish_kpi/
H A Dregisters_target.h49 } fxsave_area __attribute__ ((packed, aligned (16)));
/barrelfish-master/kernel/arch/armv8/
H A Dpaging.c38 inline static int aligned(uintptr_t address, uintptr_t bytes) function
151 assert(aligned((uintptr_t)table_base, VMSAv8_64_PTABLE_SIZE));
152 assert(aligned(pa, VMSAv8_64_PTABLE_SIZE));
166 assert(aligned((uintptr_t)table_base, VMSAv8_64_PTABLE_SIZE));
167 assert(aligned(pa, VMSAv8_64_PTABLE_SIZE));
181 assert(aligned((uintptr_t)table_base, VMSAv8_64_PTABLE_SIZE));
182 assert(aligned(pa, VMSAv8_64_PTABLE_SIZE));
198 assert(aligned((uintptr_t)table_base, VMSAv8_64_PTABLE_SIZE));
199 assert(aligned(pa, VMSAv8_64_PTABLE_SIZE));
216 assert(aligned((uintptr_
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/barrelfish-master/lib/compiler-rt/test/
H A Dclear_cache_test.c54 unsigned char execution_buffer[128] __attribute__((aligned(8)));
/barrelfish-master/usr/bench/bomp_benchmark/
H A Dlock_scalability.c28 typedef volatile uint64_t spinlock_t __attribute__ ((aligned(64)));
/barrelfish-master/tools/elver/
H A Delver.c120 __attribute__ ((aligned(BASE_PAGE_SIZE)));
123 __attribute__ ((aligned(BASE_PAGE_SIZE)));
126 __attribute__ ((aligned(BASE_PAGE_SIZE)));
/barrelfish-master/usr/bench/scheduling/
H A Dclockdrift.c37 static union padstruct startflag[MAX_CPUS] __attribute__ ((aligned(64)));
H A Dphases_scale.c24 } __attribute__ ((aligned (64)));
/barrelfish-master/lib/barrelfish/include/
H A Dthreads_priv.h50 arch_registers_state_t regs __attribute__ ((aligned (16))); ///< Register state snapshot
/barrelfish-master/lib/cxx/cxxabi/
H A Dfallback_malloc.cpp10 // is only defined when libc aligned allocation is not available.
64 char heap[HEAP_SIZE] __attribute__((aligned));
210 struct __attribute__((aligned)) __aligned_type {};

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