/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5pc100/include/mach/ |
H A D | regs-clock.h | 39 #define S5P_CLK_DIV2 S5P_CLKREG(0x308) macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5pc100/include/mach/ |
H A D | regs-clock.h | 39 #define S5P_CLK_DIV2 S5P_CLKREG(0x308) macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5p6440/include/mach/ |
H A D | regs-clock.h | 30 #define S5P_CLK_DIV2 S5P_CLKREG(0x28) macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5p6442/include/mach/ |
H A D | regs-clock.h | 43 #define S5P_CLK_DIV2 S5P_CLKREG(0x308) macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5p6440/include/mach/ |
H A D | regs-clock.h | 30 #define S5P_CLK_DIV2 S5P_CLKREG(0x28) macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5p6442/include/mach/ |
H A D | regs-clock.h | 43 #define S5P_CLK_DIV2 S5P_CLKREG(0x308) macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5p6440/ |
H A D | clock.c | 677 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 16, .size = 4 }, 687 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 }, 697 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 }, 737 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 24, .size = 4 },
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5pv210/include/mach/ |
H A D | regs-clock.h | 43 #define S5P_CLK_DIV2 S5P_CLKREG(0x308) macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5p6440/ |
H A D | clock.c | 677 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 16, .size = 4 }, 687 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 }, 697 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 }, 737 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 24, .size = 4 },
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5pv210/include/mach/ |
H A D | regs-clock.h | 43 #define S5P_CLK_DIV2 S5P_CLKREG(0x308) macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5pc100/ |
H A D | clock.c | 958 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 }, 969 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 }, 980 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 12, .size = 4 }, 991 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 }, 1133 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 16, .size = 4 }, 1155 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 20, .size = 4 },
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5pc100/ |
H A D | clock.c | 958 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 }, 969 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 }, 980 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 12, .size = 4 }, 991 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 }, 1133 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 16, .size = 4 }, 1155 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 20, .size = 4 },
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5pv210/ |
H A D | clock.c | 864 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 }, 874 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 }, 884 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 },
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5pv210/ |
H A D | clock.c | 864 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 }, 874 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 }, 884 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 },
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