Searched refs:S3C_CLK_DIV2 (Results 1 - 6 of 6) sorted by relevance
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s3c64xx/ |
H A D | clock.c | 652 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 16, .size = 4 }, 663 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 0, .size = 4 }, 673 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 4, .size = 4 }, 683 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 8, .size = 4 }, 693 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4 }, 703 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 24, .size = 4 }, 713 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 20, .size = 4 },
|
H A D | pm.c | 64 SAVE_ITEM(S3C_CLK_DIV2),
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s3c64xx/ |
H A D | clock.c | 652 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 16, .size = 4 }, 663 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 0, .size = 4 }, 673 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 4, .size = 4 }, 683 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 8, .size = 4 }, 693 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4 }, 703 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 24, .size = 4 }, 713 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 20, .size = 4 },
|
H A D | pm.c | 64 SAVE_ITEM(S3C_CLK_DIV2),
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s3c64xx/include/mach/ |
H A D | regs-clock.h | 30 #define S3C_CLK_DIV2 S3C_CLKREG(0x28) macro
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s3c64xx/include/mach/ |
H A D | regs-clock.h | 30 #define S3C_CLK_DIV2 S3C_CLKREG(0x28) macro
|
Completed in 69 milliseconds