Searched refs:MX51_PAD_EIM_D21__GPIO_2_5 (Results 1 - 4 of 4) sorted by relevance
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-mx5/ |
H A D | board-mx51_babbage.c | 127 struct pad_desc phyreset_gpio = MX51_PAD_EIM_D21__GPIO_2_5; 148 pr_debug("failed to get MX51_PAD_EIM_D21__GPIO_2_5: %d\n", ret);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-mx5/ |
H A D | board-mx51_babbage.c | 127 struct pad_desc phyreset_gpio = MX51_PAD_EIM_D21__GPIO_2_5; 148 pr_debug("failed to get MX51_PAD_EIM_D21__GPIO_2_5: %d\n", ret);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-mxc/include/mach/ |
H A D | iomux-mx51.h | 81 #define MX51_PAD_EIM_D21__GPIO_2_5 IOMUX_PAD(0x404, 0x070, 1, 0x0, 0, MX51_GPIO_PAD_CTRL) macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-mxc/include/mach/ |
H A D | iomux-mx51.h | 81 #define MX51_PAD_EIM_D21__GPIO_2_5 IOMUX_PAD(0x404, 0x070, 1, 0x0, 0, MX51_GPIO_PAD_CTRL) macro
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