/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/mach-cobalt/ |
H A D | irq.h | 40 #define MIPS_CPU_IRQ_BASE 16 macro 42 #define GT641XX_CASCADE_IRQ (MIPS_CPU_IRQ_BASE + 2) 43 #define RAQ2_SCSI_IRQ (MIPS_CPU_IRQ_BASE + 3) 44 #define ETH0_IRQ (MIPS_CPU_IRQ_BASE + 3) 45 #define QUBE1_ETH0_IRQ (MIPS_CPU_IRQ_BASE + 4) 46 #define ETH1_IRQ (MIPS_CPU_IRQ_BASE + 4) 47 #define SERIAL_IRQ (MIPS_CPU_IRQ_BASE + 5) 48 #define SCSI_IRQ (MIPS_CPU_IRQ_BASE + 5) 49 #define I8259_CASCADE_IRQ (MIPS_CPU_IRQ_BASE + 6)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/mach-cobalt/ |
H A D | irq.h | 40 #define MIPS_CPU_IRQ_BASE 16 macro 42 #define GT641XX_CASCADE_IRQ (MIPS_CPU_IRQ_BASE + 2) 43 #define RAQ2_SCSI_IRQ (MIPS_CPU_IRQ_BASE + 3) 44 #define ETH0_IRQ (MIPS_CPU_IRQ_BASE + 3) 45 #define QUBE1_ETH0_IRQ (MIPS_CPU_IRQ_BASE + 4) 46 #define ETH1_IRQ (MIPS_CPU_IRQ_BASE + 4) 47 #define SERIAL_IRQ (MIPS_CPU_IRQ_BASE + 5) 48 #define SCSI_IRQ (MIPS_CPU_IRQ_BASE + 5) 49 #define I8259_CASCADE_IRQ (MIPS_CPU_IRQ_BASE + 6)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/mach-generic/ |
H A D | irq.h | 23 #ifndef MIPS_CPU_IRQ_BASE 25 #define MIPS_CPU_IRQ_BASE 16 macro 27 #define MIPS_CPU_IRQ_BASE 0 macro 33 #define RM7K_CPU_IRQ_BASE (MIPS_CPU_IRQ_BASE+8) 39 #define RM9K_CPU_IRQ_BASE (MIPS_CPU_IRQ_BASE+12)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/mach-generic/ |
H A D | irq.h | 23 #ifndef MIPS_CPU_IRQ_BASE 25 #define MIPS_CPU_IRQ_BASE 16 macro 27 #define MIPS_CPU_IRQ_BASE 0 macro 33 #define RM7K_CPU_IRQ_BASE (MIPS_CPU_IRQ_BASE+8) 39 #define RM9K_CPU_IRQ_BASE (MIPS_CPU_IRQ_BASE+12)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/mach-pnx833x/ |
H A D | irq.h | 48 #define MIPS_CPU_IRQ_BASE 0 macro 49 #define PNX833X_PIC_IRQ_BASE (MIPS_CPU_IRQ_BASE + MIPS_CPU_NUM_IRQ)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/mach-pnx833x/ |
H A D | irq.h | 48 #define MIPS_CPU_IRQ_BASE 0 macro 49 #define PNX833X_PIC_IRQ_BASE (MIPS_CPU_IRQ_BASE + MIPS_CPU_NUM_IRQ)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/mach-lasat/ |
H A D | irq.h | 4 #define LASAT_CASCADE_IRQ (MIPS_CPU_IRQ_BASE + 2)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/mach-powertv/ |
H A D | irq.h | 23 #define MIPS_CPU_IRQ_BASE ibase macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/mach-lasat/ |
H A D | irq.h | 4 #define LASAT_CASCADE_IRQ (MIPS_CPU_IRQ_BASE + 2)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/mach-powertv/ |
H A D | irq.h | 23 #define MIPS_CPU_IRQ_BASE ibase macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/loongson/fuloong-2e/ |
H A D | irq.c | 31 do_IRQ(MIPS_CPU_IRQ_BASE + 7); 65 setup_irq(MIPS_CPU_IRQ_BASE + 2, &cascade_irqaction); 67 setup_irq(MIPS_CPU_IRQ_BASE + 5, &cascade_irqaction);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/loongson/fuloong-2e/ |
H A D | irq.c | 31 do_IRQ(MIPS_CPU_IRQ_BASE + 7); 65 setup_irq(MIPS_CPU_IRQ_BASE + 2, &cascade_irqaction); 67 setup_irq(MIPS_CPU_IRQ_BASE + 5, &cascade_irqaction);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/cobalt/ |
H A D | irq.c | 37 do_IRQ(MIPS_CPU_IRQ_BASE + 3); 39 do_IRQ(MIPS_CPU_IRQ_BASE + 4); 41 do_IRQ(MIPS_CPU_IRQ_BASE + 5); 43 do_IRQ(MIPS_CPU_IRQ_BASE + 7);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/ |
H A D | txx9irq.h | 15 #define TXX9_IRQ_BASE (MIPS_CPU_IRQ_BASE + 8)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/cobalt/ |
H A D | irq.c | 37 do_IRQ(MIPS_CPU_IRQ_BASE + 3); 39 do_IRQ(MIPS_CPU_IRQ_BASE + 4); 41 do_IRQ(MIPS_CPU_IRQ_BASE + 5); 43 do_IRQ(MIPS_CPU_IRQ_BASE + 7);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/ |
H A D | txx9irq.h | 15 #define TXX9_IRQ_BASE (MIPS_CPU_IRQ_BASE + 8)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/kernel/ |
H A D | irq_cpu.c | 41 set_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); 47 clear_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); 71 clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); 85 clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); 102 int irq_base = MIPS_CPU_IRQ_BASE;
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/kernel/ |
H A D | irq_cpu.c | 41 set_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); 47 clear_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); 71 clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); 85 clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); 102 int irq_base = MIPS_CPU_IRQ_BASE;
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/mti-sead3/ |
H A D | sead3-platform.c | 27 UART(0x1f000900, MIPS_CPU_IRQ_BASE + 4), /* ttyS0 = USB */ 28 UART(0x1f000800, MIPS_CPU_IRQ_BASE + 4), /* ttyS1 = RS232 */
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/mti-sead3/ |
H A D | sead3-platform.c | 27 UART(0x1f000900, MIPS_CPU_IRQ_BASE + 4), /* ttyS0 = USB */ 28 UART(0x1f000800, MIPS_CPU_IRQ_BASE + 4), /* ttyS1 = RS232 */
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/mips-boards/ |
H A D | sead3int.h | 61 #define MIPS_GIC_IRQ_BASE (MIPS_CPU_IRQ_BASE + 0)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/loongson/lemote-2f/ |
H A D | irq.c | 21 #define LOONGSON_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 7) /* cpu timer */ 22 #define LOONGSON_NORTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 6) /* bonito */ 23 #define LOONGSON_UART_IRQ (MIPS_CPU_IRQ_BASE + 3) /* cpu serial port */ 24 #define LOONGSON_SOUTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 2) /* i8259 */
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/mips-boards/ |
H A D | sead3int.h | 61 #define MIPS_GIC_IRQ_BASE (MIPS_CPU_IRQ_BASE + 0)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/loongson/lemote-2f/ |
H A D | irq.c | 21 #define LOONGSON_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 7) /* cpu timer */ 22 #define LOONGSON_NORTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 6) /* bonito */ 23 #define LOONGSON_UART_IRQ (MIPS_CPU_IRQ_BASE + 3) /* cpu serial port */ 24 #define LOONGSON_SOUTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 2) /* i8259 */
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/txx9/rbtx4938/ |
H A D | irq.c | 14 * MIPS_CPU_IRQ_BASE+00 Software 0 15 * MIPS_CPU_IRQ_BASE+01 Software 1 16 * MIPS_CPU_IRQ_BASE+02 Cascade TX4938-CP0 17 * MIPS_CPU_IRQ_BASE+03 Multiplexed -- do not use 18 * MIPS_CPU_IRQ_BASE+04 Multiplexed -- do not use 19 * MIPS_CPU_IRQ_BASE+05 Multiplexed -- do not use 20 * MIPS_CPU_IRQ_BASE+06 Multiplexed -- do not use 21 * MIPS_CPU_IRQ_BASE+07 CPU TIMER 134 irq = MIPS_CPU_IRQ_BASE + 7; 140 irq = MIPS_CPU_IRQ_BASE [all...] |