Searched refs:CSR_INT (Results 1 - 12 of 12) sorted by relevance
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/wireless/iwlwifi/ |
H A D | iwl-agn-ict.c | 124 iwl_write32(priv, CSR_INT, priv->inta_mask); 162 inta = iwl_read32(priv, CSR_INT);
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H A D | iwl-helpers.h | 166 iwl_write32(priv, CSR_INT, 0xffffffff);
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H A D | iwl-csr.h | 87 #define CSR_INT (CSR_BASE+0x008) /* host interrupt status/ack */ macro
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H A D | iwl-agn.c | 1073 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, 1075 inta = iwl_read32(priv, CSR_INT); 1076 iwl_write32(priv, CSR_INT, inta); 1095 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not 1098 * reading CSR_INT. */ 1237 inta = iwl_read32(priv, CSR_INT); 1260 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, 1262 iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask); 1384 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC); 2867 iwl_write32(priv, CSR_INT, [all...] |
H A D | iwl3945-base.c | 1643 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, 1645 inta = iwl_read32(priv, CSR_INT); 1646 iwl_write32(priv, CSR_INT, inta); 1665 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not 1668 * reading CSR_INT. */ 1770 inta = iwl_read32(priv, CSR_INT); 2663 iwl_write32(priv, CSR_INT, 0xFFFFFFFF); 2677 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
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H A D | iwl-core.c | 1404 inta = iwl_read32(priv, CSR_INT); 2430 IWL_CMD(CSR_INT); 2463 CSR_INT,
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/wireless/iwlwifi/ |
H A D | iwl-agn-ict.c | 124 iwl_write32(priv, CSR_INT, priv->inta_mask); 162 inta = iwl_read32(priv, CSR_INT);
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H A D | iwl-helpers.h | 166 iwl_write32(priv, CSR_INT, 0xffffffff);
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H A D | iwl-csr.h | 87 #define CSR_INT (CSR_BASE+0x008) /* host interrupt status/ack */ macro
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H A D | iwl-agn.c | 1073 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, 1075 inta = iwl_read32(priv, CSR_INT); 1076 iwl_write32(priv, CSR_INT, inta); 1095 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not 1098 * reading CSR_INT. */ 1237 inta = iwl_read32(priv, CSR_INT); 1260 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, 1262 iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask); 1384 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC); 2867 iwl_write32(priv, CSR_INT, [all...] |
H A D | iwl3945-base.c | 1643 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, 1645 inta = iwl_read32(priv, CSR_INT); 1646 iwl_write32(priv, CSR_INT, inta); 1665 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not 1668 * reading CSR_INT. */ 1770 inta = iwl_read32(priv, CSR_INT); 2663 iwl_write32(priv, CSR_INT, 0xFFFFFFFF); 2677 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
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H A D | iwl-core.c | 1404 inta = iwl_read32(priv, CSR_INT); 2430 IWL_CMD(CSR_INT); 2463 CSR_INT,
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