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/freebsd-10.1-release/sys/powerpc/include/ | ||
H A D | pio.h | diff 235013 Fri May 04 14:14:24 MDT 2012 nwhitehorn Fix final bugs in memory barriers on PowerPC: - Use isync/lwsync unconditionally for acquire/release. Use of isync guarantees a complete memory barrier, which is important for serialization of bus space accesses with mutexes on multi-processor systems. - Go back to using sync as the I/O memory barrier, which solves the same problem as above with respect to mutex release using lwsync, while not penalizing non-I/O operations like a return to sync on the atomic release operations would. - Place an acquisition barrier around thread lock acquisition in cpu_switchin(). |
H A D | atomic.h | diff 235013 Fri May 04 14:14:24 MDT 2012 nwhitehorn Fix final bugs in memory barriers on PowerPC: - Use isync/lwsync unconditionally for acquire/release. Use of isync guarantees a complete memory barrier, which is important for serialization of bus space accesses with mutexes on multi-processor systems. - Go back to using sync as the I/O memory barrier, which solves the same problem as above with respect to mutex release using lwsync, while not penalizing non-I/O operations like a return to sync on the atomic release operations would. - Place an acquisition barrier around thread lock acquisition in cpu_switchin(). |
/freebsd-10.1-release/sys/powerpc/powerpc/ | ||
H A D | swtch32.S | diff 235013 Fri May 04 14:14:24 MDT 2012 nwhitehorn Fix final bugs in memory barriers on PowerPC: - Use isync/lwsync unconditionally for acquire/release. Use of isync guarantees a complete memory barrier, which is important for serialization of bus space accesses with mutexes on multi-processor systems. - Go back to using sync as the I/O memory barrier, which solves the same problem as above with respect to mutex release using lwsync, while not penalizing non-I/O operations like a return to sync on the atomic release operations would. - Place an acquisition barrier around thread lock acquisition in cpu_switchin(). |
H A D | swtch64.S | diff 235013 Fri May 04 14:14:24 MDT 2012 nwhitehorn Fix final bugs in memory barriers on PowerPC: - Use isync/lwsync unconditionally for acquire/release. Use of isync guarantees a complete memory barrier, which is important for serialization of bus space accesses with mutexes on multi-processor systems. - Go back to using sync as the I/O memory barrier, which solves the same problem as above with respect to mutex release using lwsync, while not penalizing non-I/O operations like a return to sync on the atomic release operations would. - Place an acquisition barrier around thread lock acquisition in cpu_switchin(). |
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