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H A D | aic7xxx.seq | diff 22451 Sun Feb 09 03:23:28 MST 1997 gibbs Clear the channel after (re)selection instead of once we see the bus go free. When we clear SCSIRATE, also clear the FAST20 bit in SXFRCTL0. This also allowed me to clean up some of the ULTRA code. ULTRAENB->FAST20 to follow the convention in the Adaptec data books. Fix the data-overrun code to set both stcnt and hcnt otherwise, the transfer will just hang until we get a timeout. Add implicit support for the NOOP message. I've never heard of the driver issueing a reject for one, but its silly to reject NOOP and who knows how a device might react. In the dma routine, check SDONE before cleaing SDMAEN. The data books mention SDONE possibly being cleared when SDMAEN is reset. Clients of dma now need to check if SINDEX is cleared to know if a phasemis occured. Fix some comments to be correct. |
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