/linux-master/arch/sh/boards/mach-kfr2r09/ |
H A D | lcd_wqvga.c | 65 static void write_reg(void *sohandle, function 82 write_reg(sohandle, so, 1, data[i]); 91 write_reg(sohandle, so, 0, 0xb0); 92 write_reg(sohandle, so, 1, 0x00); 95 write_reg(sohandle, so, 0, 0xb1); 96 write_reg(sohandle, so, 1, 0x00); 99 write_reg(sohandle, so, 0, 0xbf); 117 write_reg(sohandle, so, 0, 0x2c); 130 write_reg(sohandle, so, 1, 0x00); 137 write_reg(sohandl [all...] |
/linux-master/arch/sh/boards/mach-migor/ |
H A D | lcd_qvga.c | 49 static void write_reg(void *sys_ops_handle, function 160 write_reg(sohandle, so, 0x00, 0x22);
|
/linux-master/drivers/isdn/hardware/mISDN/ |
H A D | ipac.h | 21 write_reg_func *write_reg; member in struct:isac_hw 64 write_reg_func *write_reg; member in struct:ipac_hw
|
H A D | isar.h | 38 write_reg_func *write_reg; member in struct:isar_hw
|
/linux-master/drivers/media/dvb-frontends/cxd2880/ |
H A D | cxd2880_devio_spi.c | 122 io->write_reg = cxd2880_io_common_write_one_reg;
|
H A D | cxd2880_io.c | 44 return io->write_reg(io, tgt, sub_address, data); 59 ret = io->write_reg(io, tgt, reg_value[i].addr,
|
H A D | cxd2880_io.h | 32 int (*write_reg)(struct cxd2880_io *io, member in struct:cxd2880_io
|
H A D | cxd2880_tnrdmd.h | 23 #define slvt_unfreeze_reg(tnr_dmd) ((void)((tnr_dmd)->io->write_reg\
|
H A D | cxd2880_tnrdmd_mon.c | 29 ret = tnr_dmd->io->write_reg(tnr_dmd->io, 35 ret = tnr_dmd->io->write_reg(tnr_dmd->io, 41 ret = tnr_dmd->io->write_reg(tnr_dmd->io, 55 ret = tnr_dmd->io->write_reg(tnr_dmd->io, 82 ret = tnr_dmd->io->write_reg(tnr_dmd->io, 88 ret = tnr_dmd->io->write_reg(tnr_dmd->io, 121 ret = tnr_dmd->io->write_reg(tnr_dmd->io,
|
/linux-master/drivers/media/pci/ivtv/ |
H A D | ivtv-firmware.c | 88 write_reg(IVTV_CMD_VDM_STOP, IVTV_REG_VDM); 91 write_reg(IVTV_CMD_AO_STOP, IVTV_REG_AO); 94 write_reg(IVTV_CMD_APU_PING, IVTV_REG_APU); 98 write_reg(IVTV_CMD_VPU_STOP16, IVTV_REG_VPU); 100 write_reg(IVTV_CMD_VPU_STOP15, IVTV_REG_VPU); 103 write_reg(IVTV_CMD_HW_BLOCKS_RST, IVTV_REG_HW_BLOCKS); 106 write_reg(IVTV_CMD_SPU_STOP, IVTV_REG_SPU); 111 write_reg(IVTV_CMD_SDRAM_PRECHARGE_INIT, IVTV_REG_ENC_SDRAM_PRECHARGE); 114 write_reg(IVTV_CMD_SDRAM_REFRESH_INIT, IVTV_REG_ENC_SDRAM_REFRESH); 118 write_reg(IVTV_CMD_SDRAM_PRECHARGE_INI [all...] |
H A D | ivtv-irq.c | 69 write_reg(IVTV_IRQ_ENC_PIO_COMPLETE, 0x44); 87 write_reg(IVTV_IRQ_ENC_PIO_COMPLETE, 0x44); 424 write_reg(s->sg_handle, IVTV_REG_ENCDMAADDR); 440 write_reg(s->sg_handle, IVTV_REG_DECDMAADDR); 548 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS); 611 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS); 690 write_reg(status, IVTV_REG_DMASTATUS); 845 write_reg(yuv_offset[next_dma_frame] >> 4, 0x82c); 846 write_reg((yuv_offset[next_dma_frame] + IVTV_YUV_BUFFER_UV_OFFSET) >> 4, 0x830); 847 write_reg(yuv_offse [all...] |
/linux-master/drivers/media/radio/ |
H A D | radio-tea5777.c | 184 tea->write_reg &= ~TEA5777_W_AM_FM_MASK; 186 tea->write_reg &= ~TEA5777_W_FM_PLL_MASK; 187 tea->write_reg |= (u64)freq << TEA5777_W_FM_PLL_SHIFT; 188 tea->write_reg &= ~TEA5777_W_FM_FREF_MASK; 189 tea->write_reg |= TEA5777_W_FM_FREF_VALUE << 191 tea->write_reg &= ~TEA5777_W_FM_FORCEMONO_MASK; 193 tea->write_reg |= 1LL << TEA5777_W_FM_FORCEMONO_SHIFT; 196 tea->write_reg &= ~TEA5777_W_AM_FM_MASK; 197 tea->write_reg |= (1LL << TEA5777_W_AM_FM_SHIFT); 199 tea->write_reg [all...] |
H A D | radio-tea5777.h | 36 int (*write_reg)(struct radio_tea5777 *tea, u64 val); member in struct:radio_tea5777_ops 40 * The read value gets returned in val, akin to write_reg, byte 1 from 63 u64 write_reg; member in struct:radio_tea5777
|
/linux-master/drivers/media/usb/dvb-usb-v2/ |
H A D | mxl111sf-demod.c | 43 return (state->cfg->write_reg) ? 44 state->cfg->write_reg(state->mxl_state, addr, data) :
|
H A D | mxl111sf-demod.h | 16 int (*write_reg)(struct mxl111sf_state *state, u8 addr, u8 data); member in struct:mxl111sf_demod_config
|
H A D | mxl111sf-tuner.c | 45 return (state->cfg->write_reg) ? 46 state->cfg->write_reg(state->mxl_state, addr, data) :
|
H A D | mxl111sf-tuner.h | 40 int (*write_reg)(struct mxl111sf_state *state, u8 addr, u8 data); member in struct:mxl111sf_tuner_config
|
/linux-master/drivers/staging/fbtft/ |
H A D | fb_hx8353d.c | 26 write_reg(par, 0xB9, 0xFF, 0x83, 0x53); 29 write_reg(par, 0xB0, 0x3C, 0x01); 32 write_reg(par, 0xB6, 0x94, 0x6C, 0x50); 35 write_reg(par, 0xB1, 0x00, 0x01, 0x1B, 0x03, 0x01, 0x08, 0x77, 0x89); 38 write_reg(par, 0x3A, 0x05); 41 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 0xC0); 44 write_reg(par, MIPI_DCS_EXIT_SLEEP_MODE); 48 write_reg(par, MIPI_DCS_SET_DISPLAY_ON); 51 write_reg(par, MIPI_DCS_WRITE_LUT, 67 write_reg(pa [all...] |
H A D | fb_hx8357d.c | 30 write_reg(par, MIPI_DCS_SOFT_RESET); 34 write_reg(par, HX8357D_SETC, 0xFF, 0x83, 0x57); 38 write_reg(par, HX8357_SETRGB, 0x00, 0x00, 0x06, 0x06); 41 write_reg(par, HX8357D_SETCOM, 0x25); 44 write_reg(par, HX8357_SETOSC, 0x68); 47 write_reg(par, HX8357_SETPANEL, 0x05); 49 write_reg(par, HX8357_SETPWR1, 57 write_reg(par, HX8357D_SETSTBA, 65 write_reg(par, HX8357D_SETCYC, 74 write_reg(pa [all...] |
H A D | fb_ili9481.c | 47 write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS, 50 write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS, 53 write_reg(par, MIPI_DCS_WRITE_MEMORY_START); 63 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 67 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 71 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 75 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
|
H A D | fb_ili9486.c | 48 write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS, 51 write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS, 54 write_reg(par, MIPI_DCS_WRITE_MEMORY_START); 61 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 65 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 69 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 73 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
|
H A D | fb_ra8875.c | 55 write_reg(par, 0x88, 0x0A); 56 write_reg(par, 0x89, 0x02); 59 write_reg(par, 0x10, 0x0C); 61 write_reg(par, 0x04, 0x03); 64 write_reg(par, 0x14, 0x27); 65 write_reg(par, 0x15, 0x00); 66 write_reg(par, 0x16, 0x05); 67 write_reg(par, 0x17, 0x04); 68 write_reg(par, 0x18, 0x03); 70 write_reg(pa [all...] |
H A D | fb_s6d02a1.c | 102 write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS, 105 write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS, 108 write_reg(par, MIPI_DCS_WRITE_MEMORY_START); 126 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 130 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 134 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 138 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
|
H A D | fb_ssd1305.c | 22 * write_reg() caveat: 25 * write_reg(par, val1, val2); 28 * write_reg(par, val1); 29 * write_reg(par, val2); 47 write_reg(par, 0xAE); 50 write_reg(par, 0xD5); 51 write_reg(par, 0x80); 54 write_reg(par, 0xA8); 56 write_reg(par, 0x3F); 58 write_reg(pa [all...] |
H A D | fb_ssd1306.c | 21 * write_reg() caveat: 24 * write_reg(par, val1, val2); 27 * write_reg(par, val1); 28 * write_reg(par, val2); 46 write_reg(par, 0xAE); 49 write_reg(par, 0xD5); 50 write_reg(par, 0x80); 53 write_reg(par, 0xA8); 55 write_reg(par, 0x3F); 57 write_reg(pa [all...] |