Searched refs:tmp (Results 1 - 25 of 220) sorted by path

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/haiku/3rdparty/kallisti5/
H A Dmksysroot.sh20 tar $(for i in $EXCLUDE; do echo "--exclude $i"; done) -cvzf $OUTPUT /boot/system /bin /etc /packages /system /tmp
/haiku/3rdparty/mmu_man/onlinedemo/
H A Dhaiku.php102 // name of session and pid files in /tmp
155 return "/tmp/" . QEMU_SESSFILE_TMPL . $idx;
160 return "/tmp/" . QEMU_PIDFILE_TMPL . $idx;
165 return "/tmp/" . QEMU_LOGFILE_TMPL . $idx;
/haiku/3rdparty/mmu_man/scripts/
H A DHardwareChecker.sh374 tf=/tmp/hw_checker_$$.html
H A Dbootstrap-haiku.sh30 tf=/tmp/haiku-files.org_raw_$$
H A Dgenerate_icon_table.sh5 tmpf=/tmp/$$_icon_
16 rm /tmp/$$_icon_*
/haiku/3rdparty/pulkomandy/
H A Dcatmerge.sh12 TEMPFILE=`mktemp /tmp/catmerge.XXXXX`
/haiku/docs/apps/mail/Mass Mailing Tips/
H A DMailToTemplate15 sed "s/NAME/$Name/g" <TemplateLetter.txt >/tmp/stage1
16 sed "s/EMAIL/$EMail/g" </tmp/stage1 >/tmp/stage2
17 sed "s/COMPANY/$Company/g" </tmp/stage2 >/tmp/stage3
18 mail -v -s "Test Message to $Name" "$EMail" </tmp/stage3
H A DValidatePeopleEmails.sh9 query -a 'META:email==*' | xargs catattr META:email >/tmp/PeopleListTemp
11 cat /tmp/PeopleListTemp | while read LINE; do
27 sed 's/ $/<--Blanks at the end of the e-mail, BAD!/' </tmp/PeopleListTemp >/tmp/PeopleListOut
28 sed 's/: string :<--Blanks at the end/No e-mail/' </tmp/PeopleListOut >/tmp/PeopleListBlanked
29 grep "Blanks at the end" /tmp/PeopleListBlanked
/haiku/headers/cpp/
H A Ddefalloc.h44 T* tmp = (T*)(::operator new((size_t)(size * sizeof(T)))); local
45 if (tmp == 0) {
53 return tmp;
/haiku/headers/libs/agg/
H A Dagg_simul_eq.h34 T tmp = *a1; local
36 *a2++ = tmp;
48 double max_val, tmp; local
54 if((tmp = fabs(m[i][row])) > max_val && tmp != 0.0)
56 max_val = tmp;
88 double tmp[Size][Size + RightCols]; local
94 tmp[i][j] = left[i][j];
98 tmp[i][Size + j] = right[i][j];
104 if(matrix_pivot<Size, Size + RightCols>::pivot(tmp,
[all...]
H A Dagg_span_gouraud.h144 coord_type tmp; local
147 tmp = coord[1];
149 coord[0] = tmp;
154 tmp = coord[2];
156 coord[1] = tmp;
/haiku/headers/os/interface/
H A DAffineTransform.h224 double tmp = *x; local
225 *x = tmp * sx + *y * shx + tx;
226 *y = tmp * shy + *y * sy + ty;
/haiku/headers/private/graphics/radeon/
H A Dmmio.h24 uint32 tmp = INREG( (regs), (addr) ); \
25 tmp &= (mask); \
26 tmp |= (val) & ~(mask); \
27 OUTREG( (regs), (addr), tmp ); \
/haiku/src/add-ons/accelerants/3dfx/
H A D3dfx_dpms.cpp33 uint32 tmp = INREG32(DAC_MODE) & (H_SYNC_OFF | V_SYNC_OFF); local
36 if (tmp == 0 )
38 else if (tmp == H_SYNC_OFF)
40 else if (tmp == V_SYNC_OFF)
/haiku/src/add-ons/accelerants/ati/
H A Dmach64_dpms.cpp34 uint32 tmp = INREG(CRTC_GEN_CNTL); local
37 if( (tmp & CRTC_DISPLAY_DIS) == 0 )
39 else if( (tmp & CRTC_VSYNC_DIS) == 0 )
41 else if( (tmp & CRTC_HSYNC_DIS) == 0 )
H A Dmach64_mode.cpp117 uint8 tmp = Mach64_GetPLLReg(PLL_VCLK_POST_DIV); local
119 (tmp & ~(0x03 << (2 * clkNum))) | (p << (2 * clkNum)));
126 tmp = Mach64_GetPLLReg(PLL_XCLK_CNTL);
128 Mach64_SetPLLReg(PLL_XCLK_CNTL, tmp | (0x10 << clkNum));
130 Mach64_SetPLLReg(PLL_XCLK_CNTL, tmp & ~(0x10 << clkNum));
177 int tmp = Mach64_Divide(multiplier * params.displayFIFODepth, divider, vshift, -1); local
180 for (dsp_precision = -5; tmp; dsp_precision++)
181 tmp >>= 1;
194 tmp = Mach64_Divide(RASMultiplier, RASDivider, xshift, 1);
195 if (dsp_on < tmp)
[all...]
H A Drage128_dpms.cpp35 uint32 tmp = INREG(R128_CRTC_EXT_CNTL); local
38 if( (tmp & R128_CRTC_DISPLAY_DIS) == 0 )
40 else if( (tmp & R128_CRTC_VSYNC_DIS) == 0 )
42 else if( (tmp & R128_CRTC_HSYNC_DIS) == 0 )
/haiku/src/add-ons/accelerants/intel_810/
H A Di810_dpms.cpp41 uint32 tmp = INREG8(DPMS_SYNC_SELECT) & (H_SYNC_OFF | V_SYNC_OFF); local
44 if (tmp == 0 )
46 else if (tmp == H_SYNC_OFF)
48 else if (tmp == V_SYNC_OFF)
/haiku/src/add-ons/accelerants/nvidia/engine/
H A Dnv_acc_dma.c77 uint32 cnt, tmp; local
679 tmp = (NV_REG32(NV32_NV4X_WHAT0) & 0x000000ff);
680 for (cnt = 0; (tmp && !(tmp & 0x00000001)); tmp >>= 1, cnt++)
/haiku/src/add-ons/accelerants/radeon/
H A DCursor.c224 uint32 tmp; local
227 tmp = INREG( ai->regs, RADEON_CRTC_GEN_CNTL );
230 tmp |= RADEON_CRTC_CUR_EN;
232 tmp &= ~RADEON_CRTC_CUR_EN;
235 OUTREG( ai->regs, RADEON_CRTC_GEN_CNTL, tmp );
238 tmp = INREG( ai->regs, RADEON_CRTC2_GEN_CNTL );
241 tmp |= RADEON_CRTC2_CUR_EN;
243 tmp &= ~RADEON_CRTC2_CUR_EN;
245 OUTREG( ai->regs, RADEON_CRTC2_GEN_CNTL, tmp );
H A Ddpms.c343 uint32 tmp; local
345 tmp = INREG( di->regs, RADEON_CRTC_EXT_CNTL );
347 if( (tmp & RADEON_CRTC_DISPLAY_DIS) == 0 )
350 if( (tmp & RADEON_CRTC_VSYNC_DIS) == 0 )
353 if( (tmp & RADEON_CRTC_HSYNC_DIS) == 0 )
363 uint32 tmp; local
365 tmp = INREG( di->regs, RADEON_CRTC2_GEN_CNTL );
367 if( (tmp & RADEON_CRTC2_DISP_DIS) == 0 )
370 if( (tmp & RADEON_CRTC2_VSYNC_DIS) == 0 )
373 if( (tmp
[all...]
H A Dflat_panel.c152 uint32 tmp = values->tmds_pll_cntl & 0xfffff; local
190 tmp = ai->si->tmds_pll[i].value ;
196 if (tmp & 0xfff00000) {
197 values->tmds_pll_cntl = tmp;
200 values->tmds_pll_cntl |= tmp;
203 values->tmds_pll_cntl = tmp;
293 uint32 tmp; local
306 tmp = INREG( regs, RADEON_LVDS_GEN_CNTL);
309 if (( tmp & ( RADEON_LVDS_ON | RADEON_LVDS_BLON )) ==
H A Dmonitor_detection.c421 uint32 tmp, old_dac_cntl2, old_crtc2_gen_cntl, old_dac_ext_cntl, old_tv_dac_cntl; local
476 tmp = INREG(regs, RADEON_TV_DAC_CNTL);
477 if ((tmp & RADEON_TV_DAC_CNTL_GDACDET) != 0) {
482 if ((tmp & RADEON_TV_DAC_CNTL_BDACDET) != 0) {
502 uint32 tmp; local
512 Radeon_VIPRead(ai, ai->si->theatre_channel, THEATRE_VIP_TV_DAC_CNTL, &tmp);
513 detect = (tmp & RADEON_TV_DAC_CNTL_CMPOUT) != 0;
530 Radeon_VIPRead(ai, ai->si->theatre_channel, THEATRE_VIP_TV_DAC_CNTL, &tmp);
531 cur_detect = (tmp & RADEON_TV_DAC_CNTL_CMPOUT) != 0;
H A Doverlay.c545 uint32 tmp; local
759 tmp = ((src_left & 0xffff) >> 11) + (
767 SHOW_FLOW( 3, "p1_h_accum_init=%x", tmp );
770 ((tmp << 15) & RADEON_OV0_P1_H_ACCUM_INIT_MASK) |
771 ((tmp << 23) & RADEON_OV0_P1_PRESHIFT_MASK);
776 tmp = ((src_left & 0xffff) >> 11) + (
784 SHOW_FLOW( 3, "p23_h_accum_init=%x", tmp );
787 ((tmp << 15) & RADEON_OV0_P23_H_ACCUM_INIT_MASK) |
788 ((tmp << 23) & RADEON_OV0_P23_PRESHIFT_MASK);
797 tmp
[all...]
H A Dsettings.cpp31 int32 tmp; local
57 settings.FindInt32( "TVStandard", &tmp );
59 if( tmp >= 0 && tmp <= ts_max )
60 vc->tv_standard = (tv_standard_e)tmp;
66 int32 tmp; local
85 tmp = vc->tv_standard;
86 settings.AddInt32( "TVStandard", tmp );

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