/linux-master/arch/nios2/include/asm/ |
H A D | asm-macros.h | 14 * ANDs reg2 with mask and places the result in reg1. 16 * You cannnot use the same register for reg1 & reg2. 19 .macro ANDI32 reg1, reg2, mask 22 movhi \reg1, %hi(\mask) 23 movui \reg1, %lo(\mask) variable 24 and \reg1, \reg1, \reg2 variable 26 andi \reg1, \reg2, %lo(\mask) 29 andhi \reg1, \reg2, %hi(\mask) 34 * ORs reg2 with mask and places the result in reg1 43 ori \\reg1, \\reg2, %lo(\\mask) variable 62 xori \\reg1, \\reg1, %lo(\\mask) variable [all...] |
/linux-master/arch/s390/kvm/ |
H A D | trace.h | 287 TP_PROTO(VCPU_PROTO_COMMON, int g, int reg1, int reg3, u64 addr), 288 TP_ARGS(VCPU_ARGS_COMMON, g, reg1, reg3, addr), 293 __field(int, reg1) 301 __entry->reg1 = reg1; 308 __entry->reg1, __entry->reg3, __entry->addr) 312 TP_PROTO(VCPU_PROTO_COMMON, int g, int reg1, int reg3, u64 addr), 313 TP_ARGS(VCPU_ARGS_COMMON, g, reg1, reg3, addr), 318 __field(int, reg1) 326 __entry->reg1 [all...] |
/linux-master/drivers/mcb/ |
H A D | mcb-internal.h | 66 __le32 reg1; member in struct:chameleon_gdd
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/linux-master/drivers/video/fbdev/sis/ |
H A D | init301.c | 7664 unsigned short vclkindex, temp, reg1, reg2; local 7667 reg1 = SiS_Pr->CSR2B; 7671 reg1 = SiS_Pr->SiS_VBVCLKData[vclkindex].Part4_A; 7681 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x0a,reg1); 7687 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x0a,reg1);
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/linux-master/sound/pci/ice1712/ |
H A D | wm8766.h | 124 u16 reg1, reg2, mask1, mask2, min, max, flags; member in struct:snd_wm8766_ctl
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H A D | wm8776.h | 180 u16 reg1, reg2, mask1, mask2, min, max, flags; member in struct:snd_wm8776_ctl
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/linux-master/arch/arm/crypto/ |
H A D | crct10dif-ce-core.S | 115 // Fold reg1, reg2 into the next 32 data bytes, storing the result back 116 // into reg1, reg2. 117 .macro fold_32_bytes, reg1, reg2 120 vmull.p64 q8, \reg1\()h, FOLD_CONST_H 121 vmull.p64 \reg1, \reg1\()l, FOLD_CONST_L 130 veor.8 \reg1, \reg1, q8 132 veor.8 \reg1, \reg1, q1 [all...] |
/linux-master/arch/arm/kernel/ |
H A D | hyp-stub.S | 31 .macro store_primary_cpu_mode reg1, reg2 32 mrs \reg1, cpsr 33 and \reg1, \reg1, #MODE_MASK 34 str_l \reg1, __boot_cpu_mode, \reg2 43 .macro compare_cpu_mode_with_primary mode, reg1, reg2 45 ldr \reg1, [\reg2] 46 cmp \mode, \reg1 @ matches primary CPU boot mode? 47 orrne \reg1, \reg1, #BOOT_CPU_MODE_MISMATC [all...] |
/linux-master/arch/arm/lib/ |
H A D | copy_from_user.S | 46 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort 47 ldr1w \ptr, \reg1, \abort 53 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort 54 ldr4w \ptr, \reg1, \reg2, \reg3, \reg4, \abort 66 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort 67 USERL(\abort, ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}) 70 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort 71 USERL(\abort, ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}) 86 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort 87 stmia \ptr!, {\reg1, \reg [all...] |
H A D | copy_to_user.S | 40 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort 41 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4} 44 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort 45 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8} 64 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort 65 str1w \ptr, \reg1, \abort 83 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort 84 USERL(\abort, stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8})
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H A D | csumpartialcopy.S | 25 .macro load1b, reg1 26 ldrb \reg1, [r0], #1 29 .macro load2b, reg1, reg2 30 ldrb \reg1, [r0], #1 34 .macro load1l, reg1 35 ldr \reg1, [r0], #4 38 .macro load2l, reg1, reg2 39 ldr \reg1, [r0], #4 43 .macro load4l, reg1, reg2, reg3, reg4 44 ldmia r0!, {\reg1, \reg [all...] |
H A D | csumpartialcopyuser.S | 38 .macro load1b, reg1 39 ldrusr \reg1, r0, 1 42 .macro load2b, reg1, reg2 43 ldrusr \reg1, r0, 1 47 .macro load1l, reg1 48 ldrusr \reg1, r0, 4 51 .macro load2l, reg1, reg2 52 ldrusr \reg1, r0, 4 56 .macro load4l, reg1, reg2, reg3, reg4 57 ldrusr \reg1, r [all...] |
H A D | memcpy.S | 21 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort 22 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4} 25 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort 26 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8} 37 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort 38 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
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/linux-master/arch/arm/probes/kprobes/ |
H A D | test-core.h | 239 #define TEST_RR(code1, reg1, val1, code2, reg2, val2, code3) \ 240 TESTCASE_START(code1 #reg1 code2 #reg2 code3) \ 241 TEST_ARG_REG(reg1, val1) \ 244 TEST_INSTRUCTION(code1 #reg1 code2 #reg2 code3) \ 247 #define TEST_RRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4)\ 248 TESTCASE_START(code1 #reg1 code2 #reg2 code3 #reg3 code4) \ 249 TEST_ARG_REG(reg1, val1) \ 253 TEST_INSTRUCTION(code1 #reg1 code2 #reg2 code3 #reg3 code4) \ 256 #define TEST_RRRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4, reg4, val4) \ 257 TESTCASE_START(code1 #reg1 code [all...] |
/linux-master/arch/arm64/crypto/ |
H A D | aes-cipher-core.S | 20 .macro __pair1, sz, op, reg0, reg1, in0, in1e, in1d, shift 23 ubfiz \reg1, \in1e, #2, #8 26 ubfx \reg1, \in1e, #\shift, #8 38 ldr \reg1, [tt, \reg1, uxtw #2] 42 lsl \reg1, \reg1, #2 45 ldrb \reg1, [tt, \reg1, uxtw] 49 .macro __pair0, sz, op, reg0, reg1, in [all...] |
H A D | crct10dif-ce-core.S | 216 // Fold reg1, reg2 into the next 32 data bytes, storing the result back 217 // into reg1, reg2. 218 .macro fold_32_bytes, p, reg1, reg2 221 __pmull_\p v8, \reg1, fold_consts, 2 222 __pmull_\p \reg1, \reg1, fold_consts 233 eor \reg1\().16b, \reg1\().16b, v8.16b 235 eor \reg1\().16b, \reg1\() [all...] |
/linux-master/arch/arm64/include/asm/ |
H A D | asm-uaccess.h | 69 .macro user_ldp l, reg1, reg2, addr, post_inc variable 70 8888: ldtr \reg1, [\addr]; variable 78 .macro user_stp l, reg1, reg2, addr, post_inc variable 79 8888: sttr \reg1, [\addr]; variable
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H A D | assembler.h | 673 .macro __frame_regs, reg1, reg2, op, num variable 675 \op\()r \reg1, [sp, #(\num + 1) * 8] variable 677 \op\()p \reg1, \reg2, [sp, #(\num + 1) * 8] variable
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H A D | insn.h | 587 u32 aarch64_insn_gen_load_store_pair(enum aarch64_insn_register reg1, 631 enum aarch64_insn_register reg1,
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H A D | kvm_mte.h | 14 .macro mte_switch_to_guest g_ctxt, h_ctxt, reg1 18 mrs \reg1, hcr_el2 19 tbz \reg1, #(HCR_ATA_SHIFT), .L__skip_switch\@ variable 21 mrs_s \reg1, SYS_RGSR_EL1 22 str \reg1, [\h_ctxt, #CPU_RGSR_EL1] variable 23 mrs_s \reg1, SYS_GCR_EL1 variable 24 str \reg1, [\h_ctxt, #CPU_GCR_EL1] variable 26 ldr \reg1, [\g_ctxt, #CPU_RGSR_EL1] variable 27 msr_s SYS_RGSR_EL1, \reg1 28 ldr \reg1, [\g_ctx variable 39 tbz \\reg1, #(HCR_ATA_SHIFT), .L__skip_switch\\@ variable 42 str \\reg1, [\\g_ctxt, #CPU_RGSR_EL1] variable 43 mrs_s \\reg1, SYS_GCR_EL1 variable 44 str \\reg1, [\\g_ctxt, #CPU_GCR_EL1] variable 46 ldr \\reg1, [\\h_ctxt, #CPU_RGSR_EL1] variable 48 ldr \\reg1, [\\h_ctxt, #CPU_GCR_EL1] variable [all...] |
H A D | kvm_ptrauth.h | 26 .macro ptrauth_save_state base, reg1, reg2 variable 27 mrs_s \reg1, SYS_APIAKEYLO_EL1 variable 29 stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APIAKEYLO_EL1)] variable 30 mrs_s \reg1, SYS_APIBKEYLO_EL1 variable 32 stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APIBKEYLO_EL1)] variable 33 mrs_s \reg1, SYS_APDAKEYLO_EL1 variable 35 stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APDAKEYLO_EL1)] variable 36 mrs_s \reg1, SYS_APDBKEYLO_EL1 variable 38 stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APDBKEYLO_EL1)] variable 39 mrs_s \reg1, SYS_APGAKEYLO_EL variable 41 stp \\reg1, \\reg2, [\\base, #PTRAUTH_REG_OFFSET(CPU_APGAKEYLO_EL1)] variable 44 .macro ptrauth_restore_state base, reg1, reg2 variable 45 ldp \\reg1, \\reg2, [\\base, #PTRAUTH_REG_OFFSET(CPU_APIAKEYLO_EL1)] variable 48 ldp \\reg1, \\reg2, [\\base, #PTRAUTH_REG_OFFSET(CPU_APIBKEYLO_EL1)] variable 51 ldp \\reg1, \\reg2, [\\base, #PTRAUTH_REG_OFFSET(CPU_APDAKEYLO_EL1)] variable 54 ldp \\reg1, \\reg2, [\\base, #PTRAUTH_REG_OFFSET(CPU_APDBKEYLO_EL1)] variable 57 ldp \\reg1, \\reg2, [\\base, #PTRAUTH_REG_OFFSET(CPU_APGAKEYLO_EL1)] variable 69 .macro ptrauth_switch_to_guest g_ctxt, reg1, reg2, reg3 variable 74 and \\reg1, \\reg1, #(HCR_API | HCR_APK) variable 75 cbz \\reg1, .L__skip_switch\\@ variable 77 ptrauth_restore_state \\reg1, \\reg2, \\reg3 variable 81 .macro ptrauth_switch_to_hyp g_ctxt, h_ctxt, reg1, reg2, reg3 variable 86 and \\reg1, \\reg1, #(HCR_API | HCR_APK) variable 87 cbz \\reg1, .L__skip_switch\\@ variable 89 ptrauth_save_state \\reg1, \\reg2, \\reg3 variable 90 add \\reg1, \\h_ctxt, #CPU_APIAKEYLO_EL1 variable 91 ptrauth_restore_state \\reg1, \\reg2, \\reg3 variable [all...] |
/linux-master/arch/arm64/lib/ |
H A D | copy_from_user.S | 47 .macro ldp1 reg1, reg2, ptr, val 48 user_ldp 9997f, \reg1, \reg2, \ptr, \val 51 .macro stp1 reg1, reg2, ptr, val 52 stp \reg1, \reg2, [\ptr], \val
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H A D | copy_to_user.S | 46 .macro ldp1 reg1, reg2, ptr, val 47 ldp \reg1, \reg2, [\ptr], \val 50 .macro stp1 reg1, reg2, ptr, val 51 user_stp 9997f, \reg1, \reg2, \ptr, \val
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H A D | insn.c | 479 u32 aarch64_insn_gen_load_store_pair(enum aarch64_insn_register reg1, argument 531 reg1); 1054 enum aarch64_insn_register reg1, 1089 reg1); 1052 aarch64_insn_gen_data3(enum aarch64_insn_register dst, enum aarch64_insn_register src, enum aarch64_insn_register reg1, enum aarch64_insn_register reg2, enum aarch64_insn_variant variant, enum aarch64_insn_data3_type type) argument
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/linux-master/arch/mips/include/asm/octeon/ |
H A D | cvmx-pko.h | 176 * The size of the reg1 operation - could be 8, 16, 191 * The register, subtract will be done if reg1 is 194 uint64_t reg1:11; member in struct:cvmx_pko_command_word0::__anon23 257 uint64_t reg1:11;
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