Searched refs:mc_vbase (Results 1 - 4 of 4) sorted by path
/linux-master/drivers/edac/ |
H A D | altera_edac.c | 88 regmap_read(drvdata->mc_vbase, priv->ecc_stat_offset, &status); 91 regmap_read(drvdata->mc_vbase, priv->ecc_daddr_offset, 94 regmap_read(drvdata->mc_vbase, priv->ecc_uecnt_offset, 100 regmap_read(drvdata->mc_vbase, priv->ecc_saddr_offset, 103 regmap_read(drvdata->mc_vbase, priv->ecc_cecnt_offset, 110 regmap_write(drvdata->mc_vbase, priv->ecc_irq_clr_offset, 137 regmap_read(drvdata->mc_vbase, priv->ce_ue_trgr_offset, 149 regmap_write(drvdata->mc_vbase, priv->ce_ue_trgr_offset, 156 regmap_write(drvdata->mc_vbase, priv->ce_ue_trgr_offset, 165 regmap_write(drvdata->mc_vbase, pri 232 a10_init(struct regmap *mc_vbase) argument 287 struct regmap *mc_vbase; local [all...] |
H A D | altera_edac.h | 184 struct regmap *mc_vbase; member in struct:altr_sdram_mc_data
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H A D | fsl_ddr_edac.c | 63 ddr_in32(pdata->mc_vbase + FSL_MC_DATA_ERR_INJECT_HI)); 73 ddr_in32(pdata->mc_vbase + FSL_MC_DATA_ERR_INJECT_LO)); 83 ddr_in32(pdata->mc_vbase + FSL_MC_ECC_ERR_INJECT)); 100 ddr_out32(pdata->mc_vbase + FSL_MC_DATA_ERR_INJECT_HI, val); 120 ddr_out32(pdata->mc_vbase + FSL_MC_DATA_ERR_INJECT_LO, val); 140 ddr_out32(pdata->mc_vbase + FSL_MC_ECC_ERR_INJECT, val); 289 err_detect = ddr_in32(pdata->mc_vbase + FSL_MC_ERR_DETECT); 298 ddr_out32(pdata->mc_vbase + FSL_MC_ERR_DETECT, err_detect); 302 syndrome = ddr_in32(pdata->mc_vbase + FSL_MC_CAPTURE_ECC); 305 bus_width = (ddr_in32(pdata->mc_vbase [all...] |
H A D | fsl_ddr_edac.h | 71 void __iomem *mc_vbase; member in struct:fsl_mc_pdata
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