/linux-master/arch/alpha/include/asm/ |
H A D | spinlock.h | 11 * Simple spin lock operations. There are two variants, one clears IRQ's 17 #define arch_spin_is_locked(x) ((x)->lock != 0) 19 static inline int arch_spin_value_unlocked(arch_spinlock_t lock) argument 21 return lock.lock == 0; 24 static inline void arch_spin_unlock(arch_spinlock_t * lock) argument 27 lock->lock = 0; 30 static inline void arch_spin_lock(arch_spinlock_t * lock) argument 46 : "=&r" (tmp), "=m" (lock 50 arch_spin_trylock(arch_spinlock_t *lock) argument 57 arch_read_lock(arch_rwlock_t *lock) argument 77 arch_write_lock(arch_rwlock_t *lock) argument 97 arch_read_trylock(arch_rwlock_t * lock) argument 119 arch_write_trylock(arch_rwlock_t * lock) argument 141 arch_read_unlock(arch_rwlock_t * lock) argument 157 arch_write_unlock(arch_rwlock_t * lock) argument [all...] |
/linux-master/arch/alpha/kernel/ |
H A D | pci_impl.h | 135 spinlock_t lock; member in struct:pci_iommu_arena
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/linux-master/arch/arm/include/asm/mach/ |
H A D | irq.h | 25 raw_spin_lock(&desc->lock); \ 27 raw_spin_unlock(&desc->lock); \
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/linux-master/arch/arm/include/asm/ |
H A D | mcs_spinlock.h | 9 #define arch_mcs_spin_lock_contended(lock) \ 13 while (!(smp_load_acquire(lock))) \ 17 #define arch_mcs_spin_unlock_contended(lock) \ 19 smp_store_release(lock, 1); \
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/linux-master/arch/arm/kernel/ |
H A D | dma.c | 62 if (xchg(&dma->lock, 1) != 0) 74 xchg(&dma->lock, 0); 105 if (xchg(&dma->lock, 0) != 0) { 188 if (!dma->lock) 209 if (!dma->lock) 270 if (dma && dma->lock)
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/linux-master/arch/arm/mach-omap2/ |
H A D | sram242x.S | 45 /* dll lock mode */ 51 and r10, r10, r9 @ clear bit2 for lock mode. 55 bl i_dll_wait @ wait for dll to lock 78 bl i_dll_wait @ wait for possible lock 272 orr r8, r7, #0x3 @ val for lock dpll 279 ldr r8, [r5] @ get lock val 284 /* update memory timings & briefly lock dll */ 290 and r10, r10, r9 @ clear bit2 for lock mode
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H A D | sram243x.S | 45 /* dll lock mode */ 51 and r10, r10, r9 @ clear bit2 for lock mode. 55 bl i_dll_wait @ wait for dll to lock 78 bl i_dll_wait @ wait for possible lock 272 orr r8, r7, #0x3 @ val for lock dpll 279 ldr r8, [r5] @ get lock val 284 /* update memory timings & briefly lock dll */ 290 and r10, r10, r9 @ clear bit2 for lock mode
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/linux-master/arch/m68k/ifpsp060/ |
H A D | iskeleton.S | 183 | Entry point for the operating system`s routine to "lock" a page 186 | region. Note: the routine must lock two pages if the operand
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/linux-master/arch/mips/alchemy/devboards/ |
H A D | bcsr.c | 23 spinlock_t lock; member in struct:bcsr_reg 46 spin_lock_init(&bcsr_regs[i].lock); 55 spin_lock_irqsave(&bcsr_regs[reg].lock, flags); 57 spin_unlock_irqrestore(&bcsr_regs[reg].lock, flags); 66 spin_lock_irqsave(&bcsr_regs[reg].lock, flags); 69 spin_unlock_irqrestore(&bcsr_regs[reg].lock, flags); 78 spin_lock_irqsave(&bcsr_regs[reg].lock, flags); 84 spin_unlock_irqrestore(&bcsr_regs[reg].lock, flags);
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/linux-master/arch/mips/include/asm/mach-au1x00/ |
H A D | au1xxx_dbdma.h | 319 spinlock_t lock; member in struct:dbdma_chan_config
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/linux-master/arch/mips/include/asm/octeon/ |
H A D | cvmx-bootmem.h | 100 uint32_t lock; member in struct:cvmx_bootmem_desc 126 uint32_t lock;
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H A D | cvmx-dpi-defs.h | 858 uint64_t lock:1; member in struct:cvmx_dpi_sli_prtx_err_info::cvmx_dpi_sli_prtx_err_info_s 868 uint64_t lock:1;
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H A D | cvmx-l2c-defs.h | 214 __BITFIELD_FIELD(uint64_t lock:1,
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H A D | cvmx-spinlock.h | 61 * @lock: Lock to initialize 63 static inline void cvmx_spinlock_init(cvmx_spinlock_t *lock) argument 65 lock->value = CVMX_SPINLOCK_UNLOCKED_VAL; 71 * @lock: Lock to check 74 static inline int cvmx_spinlock_locked(cvmx_spinlock_t *lock) argument 76 return lock->value != CVMX_SPINLOCK_UNLOCKED_VAL; 80 * Releases lock 82 * @lock: pointer to lock structure 84 static inline void cvmx_spinlock_unlock(cvmx_spinlock_t *lock) argument 103 cvmx_spinlock_trylock(cvmx_spinlock_t *lock) argument 128 cvmx_spinlock_lock(cvmx_spinlock_t *lock) argument [all...] |
/linux-master/arch/powerpc/include/asm/ |
H A D | fsl_lbc.h | 280 spinlock_t lock; member in struct:fsl_lbc_ctrl
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H A D | mpic_msgr.h | 19 raw_spinlock_t lock; member in struct:mpic_msgr
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H A D | msi_bitmap.h | 15 spinlock_t lock; member in struct:msi_bitmap
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/linux-master/arch/sh/include/asm/ |
H A D | spinlock-cas.h | 26 #define arch_spin_is_locked(x) ((x)->lock <= 0) 28 static inline void arch_spin_lock(arch_spinlock_t *lock) argument 30 while (!__sl_cas(&lock->lock, 1, 0)); 33 static inline void arch_spin_unlock(arch_spinlock_t *lock) argument 35 __sl_cas(&lock->lock, 0, 1); 38 static inline int arch_spin_trylock(arch_spinlock_t *lock) argument 40 return __sl_cas(&lock->lock, [all...] |
H A D | spinlock-llsc.h | 18 #define arch_spin_is_locked(x) ((x)->lock <= 0) 21 * Simple spin lock operations. There are two variants, one clears IRQ's 26 static inline void arch_spin_lock(arch_spinlock_t *lock) argument 41 : "r" (&lock->lock) 46 static inline void arch_spin_unlock(arch_spinlock_t *lock) argument 56 : "r" (&lock->lock) 61 static inline int arch_spin_trylock(arch_spinlock_t *lock) argument 74 : "r" (&lock [all...] |
/linux-master/arch/sparc/include/asm/ |
H A D | bitext.h | 14 spinlock_t lock; member in struct:bit_map
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H A D | ebus_dma.h | 6 spinlock_t lock; member in struct:ebus_dma_info
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H A D | iommu-common.h | 17 spinlock_t lock; member in struct:iommu_pool
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H A D | iommu_64.h | 58 spinlock_t lock; member in struct:iommu
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H A D | mmu_64.h | 108 spinlock_t lock; member in struct:__anon1148
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H A D | spinlock_32.h | 16 #define arch_spin_is_locked(lock) (*((volatile unsigned char *)(lock)) != 0) 18 static inline void arch_spin_lock(arch_spinlock_t *lock) argument 34 : "r" (lock) 38 static inline int arch_spin_trylock(arch_spinlock_t *lock) argument 43 : "r" (lock) 48 static inline void arch_spin_unlock(arch_spinlock_t *lock) argument 50 __asm__ __volatile__("stb %%g0, [%0]" : : "r" (lock) : "memory"); 59 * irq-safe write-lock, but readers can get non-irqsafe 74 * but counter is non-zero, he has to release the lock an 133 arch_write_unlock(arch_rwlock_t *lock) argument [all...] |