Searched refs:l2 (Results 1 - 25 of 130) sorted by path

123456

/linux-master/arch/arm/common/
H A Dkrait-l2-accessors.c8 #include <asm/krait-l2-accessors.h>
/linux-master/arch/microblaze/lib/
H A Dmulsi3.S28 l2: label
33 beqi r7, l2
34 bneid r6, l2
/linux-master/arch/parisc/lib/
H A Dio.c169 unsigned int l = 0, l2; local
221 l2 = cpu_to_le16(inw(port));
222 *(unsigned short *)p = (l & 0xff) << 8 | (l2 >> 8);
224 l = l2;
241 unsigned int l = 0, l2; local
268 l2 = cpu_to_le32(inl(port));
269 *(unsigned int *)p = (l & 0xffff) << 16 | (l2 >> 16);
271 l = l2;
285 l2 = cpu_to_le32(inl(port));
286 *(unsigned int *)p = (l & 0xff) << 24 | (l2 >>
339 unsigned int l = 0, l2; local
411 unsigned int l = 0, l2; local
[all...]
/linux-master/arch/powerpc/boot/dts/fsl/
H A Dmpc8544si-post.dtsi167 L2: l2-cache-controller@20000 {
168 compatible = "fsl,mpc8544-l2-cache-controller";
H A Dmpc8548si-post.dtsi136 L2: l2-cache-controller@20000 {
137 compatible = "fsl,mpc8548-l2-cache-controller";
H A Dmpc8568si-post.dtsi148 L2: l2-cache-controller@20000 {
149 compatible = "fsl,mpc8568-l2-cache-controller";
H A Dmpc8569si-post.dtsi142 L2: l2-cache-controller@20000 {
143 compatible = "fsl,mpc8569-l2-cache-controller";
H A Dp1020si-post.dtsi136 L2: l2-cache-controller@20000 {
137 compatible = "fsl,p1020-l2-cache-controller";
H A Dp1021si-post.dtsi136 L2: l2-cache-controller@20000 {
137 compatible = "fsl,p1021-l2-cache-controller";
H A Dp1023si-post.dtsi198 L2: l2-cache-controller@20000 {
199 compatible = "fsl,p1023-l2-cache-controller";
/linux-master/arch/sparc/include/asm/
H A Dhead_32.h25 jmpl %l2, %g0; rett %l2 + 4; nop; nop;
67 rd %psr, %i0; jmp %l2; rett %l2 + 4; nop;
H A Dttable.h20 clr %l0; clr %l1; clr %l2; clr %l3; \
179 add %l1, 4, %l2; \
182 stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC];
254 stx %l2, [%sp + STACK_BIAS + 0x10]; \
275 stx %l2, [%sp + STACK_BIAS + 0x10]; \
303 stxa %l2, [%g1 + %g0] ASI; \
333 stxa %l2, [%sp + STACK_BIAS + 0x10] %asi; \
367 stx %l2, [%g3 + TI_REG_WINDOW + 0x10]; \
399 stwa %l2, [%g1 + %g0] ASI; \
432 stwa %l2, [
[all...]
H A Dwinmacro.h18 std %l2, [%reg + RW_L2]; \
29 ldd [%reg + RW_L2], %l2; \
/linux-master/arch/sparc/kernel/
H A Detrap_32.S22 #define t_npc l2 /* Set by caller */
71 * %l0 contains trap time %psr, %l1 and %l2 contain the
H A Detrap_64.S135 add %g7, 4, %l2
181 wrpr %l2, %tnpc
H A Dhvtramp.S57 lduw [%l0 + HVTRAMP_DESCR_NUM_MAPPINGS], %l2
71 cmp %l1, %l2
H A Dwinfixup.S58 stx %l2, [%g3 + TI_REG_WINDOW + 0x10]
75 stw %l2, [%g3 + TI_REG_WINDOW + 0x08]
H A Dwof.S36 #define t_npc l2 /* NPC for trap return T */
H A Dwuf.S23 #define t_npc l2
/linux-master/arch/sparc/lib/
H A DNGpage.S31 ldda [%i1 + 0x20] %asi, %l2
37 stxa %l2, [%i0 + 0x20] %asi
43 ldda [%i1 + 0x60] %asi, %l2
49 stxa %l2, [%i0 + 0x60] %asi
H A DPeeCeeI.c37 u32 l, l2; local
60 /* Hold three bytes in l each time, grab a byte from l2 */
65 l2 = *(u32 *)src;
66 l |= (l2 >> 24);
68 l = l2 << 8;
73 /* Hold a byte in l each time, grab 3 bytes from l2 */
77 l2 = *(u32 *)src;
78 l |= (l2 >> 8);
80 l = l2 << 24;
154 u32 l = 0, l2, *p local
[all...]
/linux-master/arch/sparc/power/
H A Dhibernate_asm.S76 ldxa [%l0 + 8] %asi, %l2 /* orig_address */
80 sub %l2, %g7, %l2
85 stxa %g2, [%l2 + %l3] ASI_PHYS_USE_EC
/linux-master/arch/sparc/prom/
H A Dcif.S18 ldx [%o1 + 0x0008], %l2 ! prom_cif_handler
22 call %l2
40 ldx [%i1 + 0x000], %l2
41 call %l2
/linux-master/drivers/gpu/drm/nouveau/include/nvif/
H A Dcl9097.h33 __u32 l2[4]; member in struct:fermi_a_zbc_color_v0
43 __u32 l2; member in struct:fermi_a_zbc_depth_v0
/linux-master/drivers/isdn/mISDN/
H A Dlayer2.h34 struct layer2 *l2; member in struct:teimgr

Completed in 254 milliseconds

123456