Searched refs:instruction (Results 1 - 25 of 123) sorted by path

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/linux-master/arch/arm/mm/
H A Dabort-ev4.S13 * Purpose : obtain information about current aborted instruction.
22 ldr r3, [r4] @ read aborted ARM instruction
H A Dabort-ev4t.S14 * Purpose : obtain information about current aborted instruction.
24 ldreq r3, [r4] @ read aborted ARM instruction
H A Dabort-ev5t.S14 * Purpose : obtain information about current aborted instruction.
24 ldreq r3, [r4] @ read aborted ARM instruction
H A Dabort-ev5tj.S14 * Purpose : obtain information about current aborted instruction.
27 ldreq r3, [r4] @ read aborted ARM instruction
H A Dabort-lv4t.S13 * Purpose : obtain information about current aborted instruction.
29 ldr r8, [r4] @ read arm instruction
77 and r9, r8, #15 << 16 @ Extract 'n' from instruction
97 and r9, r8, #15 << 16 @ Extract 'n' from instruction
113 and r9, r8, #15 << 16 @ Extract 'n' from instruction
126 and r7, r8, #15 @ Extract 'm' from instruction
169 ldrh r8, [r4] @ read instruction
H A Dabort-macro.S4 * differently than every other instruction, so it is set to 0 (write)
16 ldrh \tmp, [\pc] @ Read aborted Thumb instruction
28 * We check for the following instruction encoding for LDRD.
/linux-master/arch/m68k/fpsp040/
H A Dbugfix.S65 | /* If the xu instruction is exceptional, we punt.
114 | /* If the xu instruction is exceptional, we punt.
247 | dest and the dest of the xu. We must clear the instruction in
248 | the cu and restore the state, allowing the instruction in the
249 | xu to complete. Remember, the instruction in the nu
251 | If the result of the xu instruction is not exceptional, we can
252 | restore the instruction from the cu to the frame and continue
275 | Check if the instruction which just completed was exceptional.
280 | It is necessary to isolate the result of the instruction in the
369 | dest and the dest of the xu. We must clear the instruction i
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H A Dfpsp.h65 | instruction that generates (say) an underflow. Alternatively,
H A Dgen_except.S221 | No exceptions are to be reported. If the instruction was
322 | are set by a previous instruction and not cleared by
324 | instruction in an emulation routine caused the exception
347 | instruction of an emulation routine.
390 | The address of the instruction that caused the
H A Dget_op.S8 | instruction exception handler ('unimp' - vector 11). 'get_op'
33 | and the instruction is then restored back into the '040. The
34 | '040 is then able to complete the instruction.
40 | then an frestore is done to restore the instruction back into
42 | a normalized number in the source and the instruction is
50 | norm. The instruction is then restored back into the '040
51 | which re_executes the instruction.
199 | If the instruction is fmovecr, exit get_op. It is handled
305 | instruction is dyadic or monadic is still unknown
H A Dres_func.S757 | This code handles the case of the instruction resulting in
802 | and complete the instruction.
977 | and complete the instruction.
1158 | and complete the instruction.
1196 | and complete the instruction.
1217 | This code handles the case of the instruction resulting in
H A Dscale.S10 | the fscale unimplemented instruction.
41 | This entry point is used by the unimplemented instruction exception
H A Dsetox.S178 | Note also that we use the FMOVEM instruction to move X
H A Dsgetem.S39 | This entry point is used by the unimplemented instruction exception
65 | This entry point is used by the unimplemented instruction exception
H A Dsmovecr.S5 | offset given in the instruction field.
7 | Input: An offset in the instruction word.
H A Dtbldo.S46 | instruction ;opcode-stag Notes
H A Dutil.S11 | g_opcls: returns the opclass of the float instruction.
94 | instruction is fsgldiv or fsglmul or fsadd, fdadd, fsub, fdsub, fsmul,
96 | If the instruction is fsgldiv of fsglmul, the rounding precision must be
97 | extended. If the instruction is not fsgldiv or fsglmul but a force-
98 | precision instruction, the rounding precision is then set to the force
118 bra ovf_fpcr |instruction is none of the above
124 beql ovff_sgl |the instruction is force single
126 beql ovff_dbl |the instruction is force double
301 | get_fline --- get f-line opcode of interrupted instruction
H A Dx_fline.S8 | Next, determine if the instruction is an fmovecr with a non-zero
50 moveal EXC_PC+4(%a6),%a0 |get address of fline instruction
65 | ;if an FMOVECR instruction, fix stack
H A Dx_ovfl.S14 | If the instruction is move_out, then garbage is stored in the
15 | destination. If the instruction is not move_out, then the
174 | CCs are defined to be 'not affected' for the opclass3 instruction.
H A Dx_snan.S18 | disabled with the exception posted. If the instruction is not move_
H A Dx_unimp.S4 | fpsp_unimp --- FPSP handler for unimplemented instruction
19 | instruction.
/linux-master/arch/m68k/ifpsp060/
H A Dfskeleton.S111 | instruction.
130 | instruction.
149 | instruction.
168 | instruction.
189 | bit in the FPSR, and does an "rte". The instruction that caused the
227 | frame to the PC of the instruction causing the exception, and does an "rte".
228 | The execution of the instruction then proceeds with an enabled floating-point
245 | This is the exit point for the 060FPSP when an emulated "ftrapcc" instruction
H A Diskeleton.S63 | the PC pointing to the instruction following the instruction
65 | To simply continue execution at the next instruction, just
85 | Instruction exception handler. If the instruction was a "chk2"
120 | Instruction exception handler isp_unimp(). If the instruction is a 64-bit
/linux-master/arch/m68k/ifpsp060/src/
H A Dfplsp.S529 set fmovm_flg, 0x40 # flag bit: fmovm instruction
6837 # Note also that we use the FMOVEM instruction to move X #
9838 # a DZ exception should occur for the instruction. If DZ is disabled, #
10122 # instruction of transcendental 060FPLSP emulation, then it has already #
10155 # The last instruction of transcendental emulation for the #
10280 # Native instruction support
H A Dfpsp.S549 set fmovm_flg, 0x40 # flag bit: fmovm instruction
586 # _imem_read_long() - read instruction longword #
592 # fout() - emulate an opclass 3 instruction #
613 # instruction, the 060 will take an overflow exception whether the #
615 # This handler emulates the instruction to determine what the correct #
622 # the default result (only if the instruction is opclass 3). For #
630 # Also, in the case of an opclass three instruction where #
649 # the FPIAR holds the "current PC" of the faulting instruction
651 mov.l EXC_EXTWPTR(%a6),%a0 # fetch instruction addr
652 addq.l &0x4,EXC_EXTWPTR(%a6) # incr instruction pt
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