Searched refs:core (Results 1 - 25 of 2711) sorted by path

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/linux-master/Documentation/target/
H A Dtarget-export-device37 CORE_DIR=$CONFIGFS/target/core
/linux-master/arch/arm/include/debug/
H A Dvexpress.S26 @ - the original A9 core tile (based on ARM Cortex-A9 r0p1)
/linux-master/arch/arm/kernel/
H A Datags_compat.c121 tag->u.core.flags = params->u1.s.flags & FLAG_READONLY;
122 tag->u.core.pagesize = params->u1.s.page_size;
123 tag->u.core.rootdev = params->u1.s.rootdev;
/linux-master/arch/arm/probes/uprobes/
H A DMakefile2 obj-$(CONFIG_UPROBES) += core.o actions-arm.o
/linux-master/arch/m68k/ifpsp060/src/
H A Disp.S262 # in oreder to promote readability within the core code itself.
2722 # _real_cas2() - "callout" to core cas2 emulation code #
2730 # see cas2 core emulation code #
2734 # see cas2 core emulation code #
2747 # Finally, branch to the core cas2 emulation code by calling the #
2927 # of core cas/cas2emulation code #
3147 lea _CASHI(%pc),%a1 # load end of CAS core code
3150 lea _CASLO(%pc),%a1 # load begin of CAS core code
3161 # This is the start of the cas and cas2 "core" emulation code. #
3178 # _isp_cas2(): "core" emulatio
[all...]
/linux-master/arch/mips/bcm47xx/
H A Dirq.c78 bcma_write32(bcm47xx_bus.bcma.bus.drv_mips.core,
/linux-master/arch/mips/bcm63xx/
H A Dreset.c130 * core reset bits
213 void bcm63xx_core_set_reset(enum bcm63xx_core_reset core, int reset) argument
215 __bcm63xx_core_set_reset(bcm63xx_reset_bits[core], reset);
/linux-master/arch/mips/include/asm/octeon/
H A Dcvmx-coremask.h12 * select a specific core, a group of cores, or all available cores, for
16 * The core numbers used in this file are the same value as what is found in
19 * For the CN78XX and other multi-node environments the core numbers are not
20 * contiguous. The core numbers for the CN78XX are as follows:
46 * Is ``core'' set in the coremask?
49 int core)
53 n = core % CVMX_COREMASK_ELTSZ;
54 i = core / CVMX_COREMASK_ELTSZ;
78 * Clear ``core'' from the coremask.
80 static inline void cvmx_coremask_clear_core(struct cvmx_coremask *pcm, int core) argument
48 cvmx_coremask_is_core_set(const struct cvmx_coremask *pcm, int core) argument
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/linux-master/arch/powerpc/include/asm/
H A Dps3stor.h47 return container_of(dev, struct ps3_storage_device, sbd.core);
/linux-master/arch/powerpc/perf/
H A Dhv-24x7-domains.h21 * physical core and virtual processor in 24x7 Counters specifications.
25 DOMAIN(PHYS_CORE, 0x02, core, true)
/linux-master/arch/x86/kernel/cpu/resctrl/
H A DMakefile2 obj-$(CONFIG_X86_CPU_RESCTRL) += core.o rdtgroup.o monitor.o
/linux-master/arch/x86/kernel/fpu/
H A DMakefile6 obj-y += init.o bugs.o core.o regset.o signal.o xstate.o
/linux-master/arch/x86/kernel/kprobes/
H A DMakefile6 obj-$(CONFIG_KPROBES) += core.o
/linux-master/arch/xtensa/include/asm/
H A Dirq.h15 #include <asm/core.h>
/linux-master/arch/xtensa/platforms/xt2000/include/platform/
H A Dhardware.h18 #include <asm/core.h>
H A Dserial.h14 #include <asm/core.h>
/linux-master/drivers/acpi/nfit/
H A DMakefile3 nfit-y := core.o
/linux-master/drivers/bcma/
H A DMakefile2 bcma-y += main.o scan.o core.o sprom.o
H A Dbcma_private.h24 bool bcma_wait_value(struct bcma_device *core, u16 reg, u32 mask, u32 value,
26 void bcma_prepare_core(struct bcma_bus *bus, struct bcma_device *core);
72 bcma_err(cc->core->bus, "Parallel flash not supported\n");
84 bcma_err(cc->core->bus, "Serial flash not supported\n");
96 bcma_err(cc->core->bus, "NAND flash not supported\n");
131 WARN_ON(pc->core->bus->hosttype == BCMA_HOSTTYPE_PCI);
136 WARN_ON(pc->core->bus->hosttype == BCMA_HOSTTYPE_PCI);
148 WARN_ON(pcie2->core->bus->hosttype == BCMA_HOSTTYPE_PCI);
H A Dcore.c12 static bool bcma_core_wait_value(struct bcma_device *core, u16 reg, u32 mask, argument
19 val = bcma_aread32(core, reg);
26 bcma_warn(core->bus, "Timeout waiting for register 0x%04X!\n", reg);
31 bool bcma_core_is_enabled(struct bcma_device *core) argument
33 if ((bcma_aread32(core, BCMA_IOCTL) & (BCMA_IOCTL_CLK | BCMA_IOCTL_FGC))
36 if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
42 void bcma_core_disable(struct bcma_device *core, u32 flags) argument
44 if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
47 bcma_core_wait_value(core, BCMA_RESET_ST, ~0, 0, 300);
49 bcma_awrite32(core, BCMA_RESET_CT
59 bcma_core_enable(struct bcma_device *core, u32 flags) argument
78 bcma_core_set_clockmode(struct bcma_device *core, enum bcma_clkmode clkmode) argument
109 bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status, bool on) argument
140 bcma_core_dma_translation(struct bcma_device *core) argument
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H A Ddriver_chipcommon_pflash.c40 if (!(bcma_read32(cc->core, BCMA_CC_FLASH_CFG) & BCMA_CC_FLASH_CFG_DS))
H A Ddriver_chipcommon_sflash.c85 bcma_err(cc->core->bus, "SFLASH control command failed (timeout)!\n");
91 struct bcma_bus *bus = cc->core->bus;
H A Ddriver_pcie2.c72 u8 core_rev = pcie2->core->id.rev;
109 u8 core_rev = pcie2->core->id.rev;
146 struct bcma_drv_cc *drv_cc = &pcie2->core->bus->drv_cc;
147 u8 core_rev = pcie2->core->id.rev;
161 struct bcma_bus *bus = pcie2->core->bus;
194 struct bcma_bus *bus = pcie2->core->bus;
/linux-master/drivers/clk/
H A Dclk-hi655x.c14 #include <linux/mfd/core.h>
/linux-master/drivers/clk/microchip/
H A Dclk-core.h66 struct pic32_clk_common *core);
68 struct pic32_clk_common *core);
70 struct pic32_clk_common *core);
72 struct pic32_clk_common *core);
74 struct pic32_clk_common *core);

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