Searched refs:barrier (Results 1 - 25 of 545) sorted by relevance

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/linux-master/tools/build/feature/
H A Dtest-pthread-barrier.c7 pthread_barrier_t barrier; local
9 pthread_barrier_init(&barrier, NULL, 1);
10 pthread_barrier_wait(&barrier);
11 return pthread_barrier_destroy(&barrier);
/linux-master/arch/sparc/include/asm/
H A Dbarrier_32.h5 #include <asm-generic/barrier.h>
H A Dbarrier_64.h6 * #51. Essentially, if a memory barrier occurs soon after a mispredicted
10 * It used to be believed that the memory barrier had to be right in the
11 * delay slot, but a case has been traced recently wherein the memory barrier
23 * the memory barrier explicitly into a "branch always, predicted taken"
44 barrier(); \
52 barrier(); \
56 #define __smp_mb__before_atomic() barrier()
57 #define __smp_mb__after_atomic() barrier()
59 #include <asm-generic/barrier.h>
/linux-master/tools/arch/sparc/include/asm/
H A Dbarrier_32.h5 #include <asm-generic/barrier.h>
/linux-master/arch/s390/include/asm/vdso/
H A Dprocessor.h5 #define cpu_relax() barrier()
/linux-master/arch/csky/include/asm/vdso/
H A Dprocessor.h8 #define cpu_relax() barrier()
/linux-master/arch/loongarch/include/asm/vdso/
H A Dprocessor.h10 #define cpu_relax() barrier()
/linux-master/include/linux/
H A Dspinlock_up.h9 #include <asm/barrier.h>
32 barrier();
40 barrier();
47 barrier();
54 #define arch_read_lock(lock) do { barrier(); (void)(lock); } while (0)
55 #define arch_write_lock(lock) do { barrier(); (void)(lock); } while (0)
56 #define arch_read_trylock(lock) ({ barrier(); (void)(lock); 1; })
57 #define arch_write_trylock(lock) ({ barrier(); (void)(lock); 1; })
58 #define arch_read_unlock(lock) do { barrier(); (void)(lock); } while (0)
59 #define arch_write_unlock(lock) do { barrier(); (voi
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/linux-master/arch/mips/include/asm/vdso/
H A Dprocessor.h22 #define cpu_relax() barrier()
/linux-master/arch/microblaze/include/asm/
H A Dbarrier.h11 #include <asm-generic/barrier.h>
/linux-master/arch/openrisc/include/asm/
H A Dbarrier.h7 #include <asm-generic/barrier.h>
/linux-master/arch/xtensa/include/asm/
H A Dbarrier.h15 #define __rmb() barrier()
25 #define __smp_mb__before_atomic() barrier()
26 #define __smp_mb__after_atomic() barrier()
29 #include <asm-generic/barrier.h>
H A Dspinlock.h14 #include <asm/barrier.h>
/linux-master/arch/riscv/include/asm/vdso/
H A Dprocessor.h7 #include <asm/barrier.h>
27 barrier();
/linux-master/tools/arch/riscv/include/asm/vdso/
H A Dprocessor.h7 #include <asm-generic/barrier.h>
27 barrier();
/linux-master/arch/sh/include/asm/
H A Dmmiowb.h5 #include <asm/barrier.h>
/linux-master/arch/x86/kernel/
H A Dtrace_clock.c6 #include <asm/barrier.h>
/linux-master/tools/arch/xtensa/include/asm/
H A Dbarrier.h15 #define rmb() barrier()
/linux-master/tools/arch/x86/include/asm/
H A Dbarrier.h27 #define smp_rmb() barrier()
28 #define smp_wmb() barrier()
35 barrier(); \
42 barrier(); \
/linux-master/arch/arc/include/asm/
H A Dbarrier.h15 * Explicit barrier provided by DMB instruction
19 * - DMB guarantees SMP as well as local barrier semantics
20 * (asm-generic/barrier.h ensures sane smp_*mb if not defined here, i.e.
21 * UP: barrier(), SMP: smp_*mb == *mb)
23 * in the general case. Plus it only provides full barrier.
42 #include <asm-generic/barrier.h>
/linux-master/arch/s390/include/asm/
H A Dtext-patching.h6 #include <asm/barrier.h>
/linux-master/arch/riscv/include/asm/
H A Dcpuidle.h10 #include <asm/barrier.h>
/linux-master/arch/mips/include/asm/
H A Dmmiowb.h5 #include <asm/barrier.h>
/linux-master/tools/testing/selftests/bpf/progs/
H A Dloop5.c20 barrier();
23 barrier();
26 barrier();
/linux-master/arch/alpha/include/asm/
H A Dirqflags.h35 barrier();
41 barrier();
47 barrier();
53 barrier();
55 barrier();

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