/linux-master/drivers/staging/rtl8723bs/core/ |
H A D | rtw_mlme.c | 2237 if (TEST_FLAG(pregistrypriv->ldpc_cap, BIT5)) 2245 if (TEST_FLAG(pregistrypriv->stbc_cap, BIT5)) 2261 if (TEST_FLAG(pregistrypriv->beamform_cap, BIT5) && bHwSupportBeamformee)
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/linux-master/drivers/scsi/lpfc/ |
H A D | lpfc_hw4.h | 772 #define LPFC_SLI4_INTR5 BIT5
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/linux-master/drivers/video/fbdev/via/ |
H A D | viafbdev.c | 1114 (viafb_read_reg(VIASR, SR2A) & BIT5) >> 4 | 1156 reg_val << 4, BIT5);
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H A D | share.h | 19 #define BIT5 0x20 macro
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H A D | hw.c | 1696 viafb_write_reg_mask(SR01, VIASR, 0x20, BIT5); 1702 viafb_write_reg_mask(SR01, VIASR, 0x00, BIT5); 1713 viafb_write_reg_mask(CRD2, VIACR, 0x20, BIT4 + BIT5); 1717 viafb_write_reg_mask(CRD2, VIACR, 0x10, BIT4 + BIT5); 1720 viafb_write_reg_mask(CRD2, VIACR, 0x30, BIT4 + BIT5); 1725 viafb_write_reg_mask(CRD2, VIACR, 0x20, BIT4 + BIT5); 1728 viafb_write_reg_mask(CRD2, VIACR, 0x00, BIT4 + BIT5); 2065 p_gfx_dpa_setting->DVP0DataDri_S1, BIT5);
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H A D | dvi.c | 62 BIT5 + BIT6 + BIT7); 66 viafb_write_reg_mask(SR3E, VIASR, 0x0, BIT5); 396 viafb_write_reg_mask(CR6C, VIACR, 0x21, BIT0 + BIT5); 408 viafb_write_reg_mask(CR93, VIACR, 0x21, BIT0 + BIT5);
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/linux-master/drivers/tty/ |
H A D | synclink_gt.c | 390 #define IRQ_DCD BIT5 2133 if (status & (BIT5 + BIT4)) { 2158 if (status & (BIT5 + BIT4 + BIT3)) { 4039 case 7: val |= BIT5; break; 4040 case 8: val |= BIT5 + BIT4; break; 4079 case 7: val |= BIT5; break; 4080 case 8: val |= BIT5 + BIT4; break; 4203 case HDLC_PREAMBLE_LENGTH_16BITS: val |= BIT5; break; 4205 case HDLC_PREAMBLE_LENGTH_64BITS: val |= BIT5 + BIT4; break; 4291 val |= BIT6 + BIT5; /* 01 [all...] |
/linux-master/lib/zstd/common/ |
H A D | zstd_internal.h | 68 #define BIT5 32 macro
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/linux-master/drivers/staging/rtl8723bs/hal/ |
H A D | odm.h | 370 ODM_BB_CCK_PD = BIT5, 424 /* For example 1T2R (A+AB = BIT0|BIT4|BIT5) */ 447 ODM_WM_AUTO = BIT5,
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H A D | HalPhyRf_8723B.c | 1227 rtw_write8(pDM_Odm->Adapter, MACReg[i], (u8)(MACBackup[i]&(~BIT5)));
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H A D | HalBtc8723b2Ant.h | 10 #define BT_INFO_8723B_2ANT_B_HID BIT5
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H A D | HalBtc8723b1Ant.h | 10 #define BT_INFO_8723B_1ANT_B_HID BIT5
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H A D | HalBtc8723b1Ant.c | 998 if (byte1 & BIT4 && !(byte1 & BIT5)) { 1000 realByte1 |= BIT5; 1002 realByte5 |= BIT5;
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H A D | Hal8723BReg.h | 398 #define IMR_BKDOK_8723B BIT5 /* AC_BK DMA OK */
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/linux-master/drivers/net/wireless/realtek/rtlwifi/btcoexist/ |
H A D | halbtc8723b1ant.c | 684 if ((byte1 & BIT4) && !(byte1 & BIT5)) { 688 real_byte1 |= BIT5; 690 real_byte5 |= BIT5;
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H A D | halbtc8821a1ant.c | 833 if (byte1 & BIT4 && !(byte1 & BIT5)) { 837 real_byte1 |= BIT5; 839 real_byte5 |= BIT5;
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H A D | halbtcoutsrc.h | 97 #define ALGO_TRACE_FW_DETAIL BIT5
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/linux-master/drivers/staging/rtl8723bs/include/ |
H A D | rtw_mlme_ext.h | 49 #define DYNAMIC_BB_CCK_PD BIT5 /* ODM_BB_CCK_PD */
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H A D | hal_com_reg.h | 525 #define HSISR_SPS_OCP_INT BIT5 552 #define RRSR_9M BIT5 646 #define CAM_USEDK BIT5 710 #define IMR_TBDER BIT5 /* For 92C, Transmit Beacon Error Interrupt */ 758 #define RCR_APWRMGT BIT5 /* Accept power management packet */ 1283 #define SDIO_HIMR_RXFOVW_MSK BIT5 1305 #define SDIO_HISR_RXFOVW BIT5
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H A D | osdep_service.h | 22 #define BIT5 0x00000020 macro
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H A D | rtl8723b_spec.h | 170 #define BIT_BCN_PORT_SEL BIT5 209 #define IMR_BKDOK_8723B BIT5 /* AC_BK DMA OK */
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H A D | hal_pwr_seq.h | 47 {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital , 1:isolation*/ \ 76 {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital , 1:isolation*/ \ 151 {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ 182 {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*reset dual TSF*/ \
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/linux-master/drivers/scsi/ |
H A D | dc395x.h | 71 #define BIT5 0x00000020 macro 134 #define SRB_ERROR BIT5 139 #define RESIDUAL_VALID BIT5 170 #define EN_TAG_QUEUEING BIT5 597 #define LUN_CHECK BIT5
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/linux-master/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/ |
H A D | pwrseq.h | 262 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5 \ 383 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, 0 \ 416 PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT5|BIT4), (BIT5|BIT4) \ 466 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5 \ 619 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5 \
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/linux-master/drivers/net/wireless/realtek/rtlwifi/rtl8192de/ |
H A D | reg.h | 363 #define RRSR_9M BIT5
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