Searched refs:tmp1 (Results 1 - 25 of 132) sorted by relevance

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/linux-master/arch/arm/mach-at91/
H A Dpm_suspend.S23 tmp1 .req r4 label
85 mcr p15, 0, tmp1, c7, c0, 4
127 * Side effects: overwrites r2, r3, tmp1, tmp2, tmp3, r7
137 ldr tmp1, [r2, #UDDRC_PCTRL_0]
138 bic tmp1, tmp1, #0x1
139 str tmp1, [r2, #UDDRC_PCTRL_0]
141 ldr tmp1, [r2, #UDDRC_PCTRL_1]
142 bic tmp1, tmp1, #
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/linux-master/arch/arm64/include/asm/
H A Dasm_pointer_auth.h12 .macro __ptrauth_keys_install_kernel_nosync tsk, tmp1, tmp2, tmp3 variable
13 mov \tmp1, #THREAD_KEYS_KERNEL variable
14 add \tmp1, \tsk, \tmp1 variable
15 ldp \tmp2, \tmp3, [\tmp1, #PTRAUTH_KERNEL_KEY_APIA]
20 .macro ptrauth_keys_install_kernel_nosync tsk, tmp1, tmp2, tmp3 variable
22 __ptrauth_keys_install_kernel_nosync \tsk, \tmp1, \tmp2, \tmp3 variable
26 .macro ptrauth_keys_install_kernel tsk, tmp1, tmp2, tmp3 variable
28 __ptrauth_keys_install_kernel_nosync \tsk, \tmp1, \tmp2, \tmp3 variable
35 .macro __ptrauth_keys_install_kernel_nosync tsk, tmp1, tmp
52 .macro __ptrauth_keys_install_user tsk, tmp1, tmp2, tmp3 variable
53 mov \\tmp1, #THREAD_KEYS_USER variable
54 add \\tmp1, \\tsk, \\tmp1 variable
60 .macro __ptrauth_keys_init_cpu tsk, tmp1, tmp2, tmp3 variable
61 mrs \\tmp1, id_aa64isar1_el1 variable
62 ubfx \\tmp1, \\tmp1, #ID_AA64ISAR1_EL1_APA_SHIFT, #8 variable
65 orr \\tmp1, \\tmp1, \\tmp2 variable
66 cbz \\tmp1, .Lno_addr_auth\\@ variable
72 __ptrauth_keys_install_kernel_nosync \\tsk, \\tmp1, \\tmp2, \\tmp3 variable
77 .macro ptrauth_keys_init_cpu tsk, tmp1, tmp2, tmp3 variable
81 __ptrauth_keys_init_cpu \\tsk, \\tmp1, \\tmp2, \\tmp3 variable
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H A Dasm-uaccess.h16 .macro __uaccess_ttbr0_disable, tmp1
17 mrs \tmp1, ttbr1_el1 // swapper_pg_dir variable
18 bic \tmp1, \tmp1, #TTBR_ASID_MASK variable
19 sub \tmp1, \tmp1, #RESERVED_SWAPPER_OFFSET // reserved_pg_dir variable
20 msr ttbr0_el1, \tmp1 // set reserved TTBR0_EL1
21 add \tmp1, \tmp1, #RESERVED_SWAPPER_OFFSET variable
22 msr ttbr1_el1, \tmp1 // se
26 .macro __uaccess_ttbr0_enable, tmp1, tmp2 variable
28 ldr \\tmp1, [\\tmp1, #TSK_TI_TTBR0] // load saved TTBR0_EL1 variable
30 extr \\tmp2, \\tmp2, \\tmp1, #48 variable
37 .macro uaccess_ttbr0_disable, tmp1, tmp2 variable
45 .macro uaccess_ttbr0_enable, tmp1, tmp2, tmp3 variable
48 __uaccess_ttbr0_enable \\tmp1, \\tmp2 variable
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/linux-master/arch/sparc/include/asm/
H A Dhead_64.h35 #define BRANCH_IF_SUN4V(tmp1,label) \
36 sethi %hi(is_sun4v), %tmp1; \
37 lduw [%tmp1 + %lo(is_sun4v)], %tmp1; \
38 brnz,pn %tmp1, label; \
41 #define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label) \
42 rdpr %ver, %tmp1; \
44 srlx %tmp1, 32, %tmp1; \
46 cmp %tmp1,
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H A Dpgtsrmmu.h89 #define WINDOW_FLUSH(tmp1, tmp2) \
90 mov 0, tmp1; \
93 add tmp1, 1, tmp1; \
96 99: subcc tmp1, 1, tmp1; \
H A Dtimer_64.h56 unsigned long tick, tmp1, tmp2; local
92 : "=&r" (tick), "=&r" (tmp1), "=&r" (tmp2)
/linux-master/arch/loongarch/lib/
H A Dcsum.c60 __uint128_t tmp1, tmp2, tmp3, tmp4; local
62 tmp1 = *(__uint128_t *)ptr;
71 tmp1 += (tmp1 >> 64) | (tmp1 << 64);
75 tmp1 = ((tmp1 >> 64) << 64) | (tmp2 >> 64);
76 tmp1 += (tmp1 >> 64) | (tmp1 << 6
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/linux-master/arch/arm/mach-tegra/
H A Dsleep.h81 .macro check_cpu_part_num part_num, tmp1, tmp2 variable
82 mrc p15, 0, \tmp1, c0, c0, 0 variable
83 ubfx \tmp1, \tmp1, #4, #12 variable
85 cmp \tmp1, \tmp2 variable
89 .macro exit_smp, tmp1, tmp2 variable
90 mrc p15, 0, \tmp1, c1, c0, 1 @ ACTLR variable
91 bic \tmp1, \tmp1, #(1<<6) | (1<<0) @ clear ACTLR.SMP | ACTLR.FW variable
92 mcr p15, 0, \tmp1, c variable
95 check_cpu_part_num 0xc09, \\tmp1, \\tmp2 variable
96 mrceq p15, 0, \\tmp1, c0, c0, 5 variable
97 andeq \\tmp1, \\tmp1, #0xF variable
98 moveq \\tmp1, \\tmp1, lsl #2 variable
101 ldreq \\tmp1, =(TEGRA_ARM_PERIF_VIRT + 0xC) variable
110 mov32 \\tmp1, \\base variable
111 ldr \\tmp1, [\\tmp1, #APB_MISC_GP_HIDREV] variable
112 and \\tmp1, \\tmp1, #0xff00 variable
113 mov \\tmp1, \\tmp1, lsr #8 variable
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/linux-master/arch/m68k/lib/
H A Dchecksum.c40 unsigned long tmp1, tmp2; local
58 "movel %1,%3\n\t" /* save len in tmp1 */
86 "movel %3,%1\n\t" /* restore len from tmp1 */
118 "=&d" (tmp1), "=&d" (tmp2)
139 unsigned long tmp1, tmp2; local
158 "movel %1,%4\n\t" /* save len in tmp1 */
202 "movel %4,%1\n\t" /* restore len from tmp1 */
261 "=&d" (tmp1), "=d" (tmp2)
276 unsigned long tmp1, tmp2; local
293 "movel %1,%4\n\t" /* save len in tmp1 */
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/linux-master/arch/arm64/lib/
H A Dcsum.c63 __uint128_t tmp1, tmp2, tmp3, tmp4; local
65 tmp1 = *(__uint128_t *)ptr;
74 tmp1 += (tmp1 >> 64) | (tmp1 << 64);
78 tmp1 = ((tmp1 >> 64) << 64) | (tmp2 >> 64);
79 tmp1 += (tmp1 >> 64) | (tmp1 << 6
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H A Dstrlen.S30 #define tmp1 x4 define
83 and tmp1, srcin, MIN_PAGE_SIZE - 1
85 cmp tmp1, MIN_PAGE_SIZE - 16
96 sub tmp1, data1, zeroones
100 bics has_nul1, tmp1, tmp2
109 clz tmp1, has_nul1
111 add len, len, tmp1, lsr 3
124 sub tmp1, data1, zeroones
126 orr tmp2, tmp1, tmp3
130 sub tmp1, data
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H A Dstrnlen.S38 tmp1 .req x8 label
54 ands tmp1, srcin, #15
74 sub tmp1, data1, zeroones
78 bic has_nul1, tmp1, tmp2
81 orr tmp1, has_nul1, has_nul2
82 ccmp tmp1, #0, #0, pl /* NZCV = 0000 */
85 cbz tmp1, .Lhit_limit /* No null in final Qword. */
106 CPU_BE( sub tmp1, data2, zeroones )
108 CPU_BE( bic has_nul2, tmp1, tmp2 )
124 * limit + tmp1
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/linux-master/scripts/
H A Dextract-ikconfig22 tail -c+$(($pos+8)) "$1" | zcat > $tmp1 2> /dev/null
25 cat $tmp1
51 tmp1=/tmp/ikconfig$$.1
53 trap "rm -f $tmp1 $tmp2" 0
/linux-master/tools/testing/selftests/bpf/prog_tests/
H A Dmmap.c24 void *bss_mmaped = NULL, *map_mmaped = NULL, *tmp0, *tmp1, *tmp2; local
55 tmp1 = mmap(NULL, page_size, PROT_READ | PROT_WRITE, MAP_SHARED, rdmap_fd, 0);
56 if (CHECK(tmp1 != MAP_FAILED, "rdonly_write_mmap", "unexpected success\n")) {
57 munmap(tmp1, page_size);
61 tmp1 = mmap(NULL, page_size, PROT_READ, MAP_SHARED, rdmap_fd, 0);
62 if (CHECK(tmp1 == MAP_FAILED, "rdonly_read_mmap", "failed: %d\n", errno))
180 tmp1 = mmap(NULL, map_sz, PROT_READ | PROT_WRITE, MAP_SHARED,
182 if (CHECK(tmp1 != MAP_FAILED, "data_mmap", "mmap succeeded\n")) {
183 munmap(tmp1, map_sz);
206 tmp1
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/linux-master/arch/powerpc/include/asm/book3s/32/
H A Dmmu-hash.h99 .macro update_user_segments_by_4 tmp1 tmp2 tmp3 tmp4
100 uus_addi 1, \tmp2, \tmp1, 0x111 variable
101 uus_addi 2, \tmp3, \tmp1, 0x222 variable
102 uus_addi 3, \tmp4, \tmp1, 0x333 variable
104 uus_mtsr 0, \tmp1
109 uus_addi 4, \tmp1, \tmp1, 0x444 variable
114 uus_mtsr 4, \tmp1
119 uus_addi 8, \tmp1, \tmp1, variable
129 uus_addi 12, \\tmp1, \\tmp1, 0x444 variable
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/linux-master/arch/arc/include/asm/
H A Duaccess.h143 unsigned long tmp1, tmp2, tmp3, tmp4; local
219 "=r"(tmp1), "=r"(tmp2), "=r"(tmp3), "=r"(tmp4)
243 "=r"(tmp1), "=r"(tmp2)
263 : "+r" (res), "+r"(to), "+r"(from), "=r"(tmp1)
283 : "+r" (res), "+r"(to), "+r"(from), "=r"(tmp1)
301 : "+r" (res), "+r"(to), "+r"(from), "=r"(tmp1)
358 "=r"(tmp1), "=r"(tmp2), "=r"(tmp3), "=r"(tmp4)
371 unsigned long tmp1, tmp2, tmp3, tmp4; local
442 "=r"(tmp1), "=r"(tmp2), "=r"(tmp3), "=r"(tmp4)
466 "=r"(tmp1), "
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/linux-master/arch/arm/include/asm/
H A Dtls.h10 .macro switch_tls_none, base, tp, tpuser, tmp1, tmp2 variable
13 .macro switch_tls_v6k, base, tp, tpuser, tmp1, tmp2 variable
20 .macro switch_tls_v6, base, tp, tpuser, tmp1, tmp2
27 ldr_va \tmp1, elf_hwcap
29 tst \tmp1, #HWCAP_TLS @ hardware TLS available?
37 .L1_\@: switch_tls_v6k \base, \tp, \tpuser, \tmp1, \tmp2
41 .macro switch_tls_software, base, tp, tpuser, tmp1, tmp2
42 mov \tmp1, #0xffff0fff
43 str \tp, [\tmp1, #-15] @ set TLS value at 0xffff0ff0
/linux-master/arch/x86/lib/
H A Dmemmove_32.S25 .set tmp1, %ebx
71 movl 1*4(src), tmp1
73 movl tmp1, 1*4(dest)
75 movl 3*4(src), tmp1
77 movl tmp1, 3*4(dest)
88 leal -4(dest, n), tmp1
91 movl tmp0, (tmp1)
98 movl dest, tmp1
104 movl tmp0,(tmp1)
129 movl -2*4(src), tmp1
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/linux-master/tools/lib/
H A Drbtree.c230 struct rb_node *node = NULL, *sibling, *tmp1, *tmp2; local
252 tmp1 = sibling->rb_left;
253 WRITE_ONCE(parent->rb_right, tmp1);
255 rb_set_parent_color(tmp1, parent, RB_BLACK);
259 sibling = tmp1;
261 tmp1 = sibling->rb_right;
262 if (!tmp1 || rb_is_black(tmp1)) {
319 tmp1 = tmp2->rb_right;
320 WRITE_ONCE(sibling->rb_left, tmp1);
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/linux-master/lib/
H A Drbtree.c230 struct rb_node *node = NULL, *sibling, *tmp1, *tmp2; local
252 tmp1 = sibling->rb_left;
253 WRITE_ONCE(parent->rb_right, tmp1);
255 rb_set_parent_color(tmp1, parent, RB_BLACK);
259 sibling = tmp1;
261 tmp1 = sibling->rb_right;
262 if (!tmp1 || rb_is_black(tmp1)) {
319 tmp1 = tmp2->rb_right;
320 WRITE_ONCE(sibling->rb_left, tmp1);
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/linux-master/arch/mips/crypto/
H A Dpoly1305-mips.pl76 my ($in0,$in1,$tmp0,$tmp1,$tmp2,$tmp3,$tmp4) = ($a4,$a5,$a6,$a7,$at,$t0,$t1);
139 subu $tmp1,$zero,$tmp0
142 dsrlv $tmp3,$in1,$tmp1
144 dsrlv $tmp2,$tmp2,$tmp1
147 dsllv $tmp3,$in1,$tmp1
149 dsllv $tmp2,$tmp2,$tmp1
171 and $tmp1,$in0,$tmp0 # byte swap
175 dsll $tmp1,24
180 or $tmp1,$tmp2
190 or $tmp1,
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/linux-master/arch/alpha/lib/
H A Ddivide.S58 #define tmp1 $3 define
110 stq tmp1,24($30)
142 subq modulus,divisor,tmp1
145 cmovne compare,tmp1,modulus
151 ldq tmp1,24($30)
184 stq tmp1,24($30)
191 subq $31,$27,tmp1
194 cmovlt $28,tmp1,$27
195 ldq tmp1,24($30)
/linux-master/arch/sh/lib/
H A Dio.c66 int tmp1; local
74 : "=&r" (data), "=&r" (tmp1)
/linux-master/arch/csky/abiv2/
H A Dfpu.c152 unsigned long tmp1, tmp2; local
157 tmp1 = mfcr("cr<1, 2>");
160 user_fp->fcr = tmp1;
202 : "=a"(tmp1), "=a"(tmp2), "=a"(tmp3),
214 unsigned long tmp1, tmp2; local
219 tmp1 = user_fp->fcr;
222 mtcr("cr<1, 2>", tmp1);
264 : "=a"(tmp1), "=a"(tmp2), "=a"(tmp3),
/linux-master/arch/mips/mm/
H A Dsc-ip22.c102 unsigned long addr, tmp1, tmp2; local
128 : "=r" (tmp1), "=r" (tmp2), "=r" (addr));
133 unsigned long tmp1, tmp2, tmp3; local
158 : "=r" (tmp1), "=r" (tmp2), "=r" (tmp3));

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