Searched refs:tbl_offset (Results 1 - 11 of 11) sorted by relevance

/linux-master/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphy_lcn.c923 u32 tbl_width, u32 tbl_offset)
930 tab.tbl_offset = tbl_offset;
937 u32 tbl_width, u32 tbl_offset)
945 tab.tbl_offset = tbl_offset;
1899 tab.tbl_offset = 87;
1914 tab.tbl_offset = 87;
1933 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET;
1938 tab.tbl_offset
921 wlc_lcnphy_common_read_table(struct brcms_phy *pi, u32 tbl_id, const u16 *tbl_ptr, u32 tbl_len, u32 tbl_width, u32 tbl_offset) argument
935 wlc_lcnphy_common_write_table(struct brcms_phy *pi, u32 tbl_id, const u16 *tbl_ptr, u32 tbl_len, u32 tbl_width, u32 tbl_offset) argument
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H A Dphy_hal.h267 s8 wlc_phy_get_tx_power_offset(struct brcms_phy_pub *ppi, u8 tbl_offset);
H A Dphy_cmn.c822 wlc_phy_table_addr(struct brcms_phy *pi, uint tbl_id, uint tbl_offset, argument
825 write_phy_reg(pi, tblAddr, (tbl_id << 10) | tbl_offset);
834 pi->tbl_save_offset = tbl_offset;
864 uint tbl_offset = ptbl_info->tbl_offset; local
870 write_phy_reg(pi, tblAddr, (tbl_id << 10) | tbl_offset);
880 (tbl_id << 10) | (tbl_offset + idx));
901 uint tbl_offset = ptbl_info->tbl_offset; local
907 write_phy_reg(pi, tblAddr, (tbl_id << 10) | tbl_offset);
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H A Dphy_int.h242 u32 tbl_offset; member in struct:phytbl_info
920 void wlc_phy_table_addr(struct brcms_phy *pi, uint tbl_id, uint tbl_offset,
H A Dphy_n.c14157 tbl.tbl_offset = offset;
14171 tbl.tbl_offset = offset;
17569 u32 tbl_id, tbl_len, tbl_offset; local
17738 tbl_offset = 0;
17757 wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32,
18795 u32 tbl_id, tbl_len, tbl_offset; local
18804 tbl_offset = 320;
18816 wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32,
18820 tbl_offset = 448;
18845 wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 3
28160 u32 tbl_offset; local
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/linux-master/drivers/pci/controller/dwc/
H A Dpcie-designware-ep.c531 u32 tbl_offset; local
541 tbl_offset = dw_pcie_ep_readl_dbi(ep, func_no, reg);
542 bir = FIELD_GET(PCI_MSIX_TABLE_BIR, tbl_offset);
543 tbl_offset &= PCI_MSIX_TABLE_OFFSET;
545 msix_tbl = ep->epf_bar[bir]->addr + tbl_offset;
/linux-master/drivers/pci/controller/cadence/
H A Dpcie-cadence-ep.c488 u32 tbl_offset, msg_data, reg; local
509 tbl_offset = cdns_pcie_ep_fn_readl(pcie, fn, reg);
510 bir = FIELD_GET(PCI_MSIX_TABLE_BIR, tbl_offset);
511 tbl_offset &= PCI_MSIX_TABLE_OFFSET;
513 msix_tbl = epf->epf_bar[bir]->addr + tbl_offset;
/linux-master/drivers/net/ethernet/marvell/
H A Dmvneta.c1637 unsigned int tbl_offset; local
1644 tbl_offset = (last_nibble / 4) * 4;
1649 unicast_reg = mvreg_read(pp, (MVNETA_DA_FILT_UCAST_BASE + tbl_offset));
1659 mvreg_write(pp, (MVNETA_DA_FILT_UCAST_BASE + tbl_offset), unicast_reg);
3076 unsigned int tbl_offset; local
3080 tbl_offset = (last_byte / 4);
3085 + tbl_offset * 4));
3094 mvreg_write(pp, MVNETA_DA_FILT_SPEC_MCAST + tbl_offset * 4,
3111 unsigned int tbl_offset; local
3114 tbl_offset
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/linux-master/drivers/net/ethernet/cavium/thunder/
H A Dnic.h495 u8 tbl_offset; member in struct:rss_cfg_msg
H A Dnicvf_main.c343 mbx.rss_cfg.tbl_offset = nextq;
346 mbx.rss_cfg.msg = mbx.rss_cfg.tbl_offset ?
H A Dnic_main.c571 rssi_base = nic->rssi_base[cfg->vf_id] + cfg->tbl_offset;

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