/linux-master/arch/riscv/kernel/tests/module_test/ |
H A D | test_set16.S | 10 la t0, set16 12 slli t0, t0, 16 13 srli t0, t0, 16 15 slli t0, t0, 48 16 srli t0, t0, 48 18 sub a0, a0, t0 [all...] |
H A D | test_set6.S | 10 la t0, set6 12 slli t0, t0, 26 13 srli t0, t0, 26 15 slli t0, t0, 58 16 srli t0, t0, 58 18 sub a0, a0, t0 [all...] |
H A D | test_set8.S | 10 la t0, set8 12 slli t0, t0, 24 13 srli t0, t0, 24 15 slli t0, t0, 56 16 srli t0, t0, 56 18 sub a0, a0, t0 [all...] |
H A D | test_set32.S | 10 la t0, set32 12 slli t0, t0, 32 13 srli t0, t0, 32 15 sub a0, a0, t0
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/linux-master/arch/mips/power/ |
H A D | hibernate_asm.S | 15 PTR_LA t0, saved_regs 16 PTR_S ra, PT_R31(t0) 17 PTR_S sp, PT_R29(t0) 18 PTR_S fp, PT_R30(t0) 19 PTR_S gp, PT_R28(t0) 20 PTR_S s0, PT_R16(t0) 21 PTR_S s1, PT_R17(t0) 22 PTR_S s2, PT_R18(t0) 23 PTR_S s3, PT_R19(t0) 24 PTR_S s4, PT_R20(t0) [all...] |
/linux-master/arch/riscv/lib/ |
H A D | memset.S | 12 move t0, a0 /* Preserve return value */ 22 addi a3, t0, SZREG-1 24 beq a3, t0, 2f /* Skip if already aligned */ 26 sub a4, a3, t0 28 sb a1, 0(t0) 29 addi t0, t0, 1 30 bltu t0, a3, 1b 47 add a3, t0, a4 55 sub t0, t [all...] |
H A D | strcmp.S | 22 * t0, t1 25 lbu t0, 0(a0) 29 bne t0, t1, 2f 30 bnez t0, 1b 38 sub a0, t0, t1 61 * t0, t1, t2, t3, t4 72 REG_L t0, 0(a0) 74 orc.b t3, t0 78 beq t0, t1, 1b 85 rev8 t0, t [all...] |
/linux-master/arch/loongarch/power/ |
H A D | hibernate_asm.S | 15 la.pcrel t0, saved_regs 16 PTR_S ra, t0, PT_R1 17 PTR_S tp, t0, PT_R2 18 PTR_S sp, t0, PT_R3 19 PTR_S u0, t0, PT_R21 20 PTR_S fp, t0, PT_R22 21 PTR_S s0, t0, PT_R23 22 PTR_S s1, t0, PT_R24 23 PTR_S s2, t0, PT_R25 24 PTR_S s3, t0, PT_R2 [all...] |
/linux-master/arch/loongarch/kernel/ |
H A D | head.S | 47 li.d t0, CSR_DMW0_INIT # UC, PLV0, 0x8000 xxxx xxxx xxxx 48 csrwr t0, LOONGARCH_CSR_DMWIN0 49 li.d t0, CSR_DMW1_INIT # CA, PLV0, 0x9000 xxxx xxxx xxxx 50 csrwr t0, LOONGARCH_CSR_DMWIN1 52 JUMP_VIRT_ADDR t0, t1 55 li.w t0, 0xb0 # PLV=0, IE=0, PG=1 56 csrwr t0, LOONGARCH_CSR_CRMD 57 li.w t0, 0x04 # PLV=0, PIE=1, PWE=0 58 csrwr t0, LOONGARCH_CSR_PRMD 59 li.w t0, [all...] |
H A D | genex.S | 22 LONG_L t0, tp, TI_FLAGS 24 andi t0, t0, _TIF_NEED_RESCHED 25 bnez t0, 1f 39 LONG_L t0, sp, PT_ERA 41 ori t0, t0, 0x1f 42 xori t0, t0, 0x1f 43 bne t0, t [all...] |
/linux-master/drivers/soc/bcm/brcmstb/pm/ |
H A D | s2-mips.S | 42 move t0, a0 44 lw s0, 0(t0) 45 lw s1, 4(t0) 46 lw s2, 8(t0) 47 lw s3, 12(t0) 48 lw s4, 16(t0) 49 lw s5, 20(t0) 55 la t0, brcm_pm_do_s2 56 and t0, t1 61 1: cache 0x1c, 0(t0) [all...] |
H A D | s3-mips.S | 25 la t0, gp_regs 26 sw ra, 0(t0) 27 sw s0, 4(t0) 28 sw s1, 8(t0) 29 sw s2, 12(t0) 30 sw s3, 16(t0) 31 sw s4, 20(t0) 32 sw s5, 24(t0) 33 sw s6, 28(t0) 34 sw s7, 32(t0) [all...] |
/linux-master/arch/mips/include/asm/mach-ip27/ |
H A D | kernel-entry-init.h | 34 dli t0, 0xffffffffc0000000 35 dmtc0 t0, CP0_ENTRYHI variable 36 li t0, 0x1c000 # Offset of text into node memory variable 39 or t1, t1, t0 # Physical load address of kernel text 40 or t2, t2, t0 # Physical load address of kernel data 45 li t0, ((PAGE_GLOBAL | PAGE_VALID | CACHE_CACHABLE_COW) >> 6) variable 46 or t0, t0, t1 variable 47 mtc0 t0, CP0_ENTRYLO0 # physaddr, VG, cach exlwr variable 48 li t0, ((PAGE_GLOBA variable 49 or t0, t0, t2 variable 50 mtc0 t0, CP0_ENTRYLO1 # physaddr, DVG, cach exlwr variable 51 li t0, 0x1ffe000 # MAPPED_KERN_TLBMASK, TLBPGMASK_16M variable 52 mtc0 t0, CP0_PAGEMASK variable 53 li t0, 0 # KMAP_INX variable 54 mtc0 t0, CP0_INDEX variable 55 li t0, 1 variable 56 mtc0 t0, CP0_WIRED variable 81 or t0, t0, t1 variable 82 ld t0, 0(t0) # t0 points to kern_vars struct variable 91 PTR_LA t0, 0f variable [all...] |
/linux-master/arch/mips/include/asm/mach-malta/ |
H A D | kernel-entry-init.h | 35 * The following code uses the t0, t1, t2 and ra registers without 52 li t0, ((MIPS_SEGCFG_MK << MIPS_SEGCFG_AM_SHIFT) | \ variable 58 or t0, t2 variable 59 mtc0 t0, CP0_SEGCTL0 variable 62 li t0, ((MIPS_SEGCFG_MUSUK << MIPS_SEGCFG_AM_SHIFT) | \ variable 69 ins t0, t1, 16, 3 variable 70 mtc0 t0, CP0_SEGCTL1 variable 73 li t0, ((MIPS_SEGCFG_MUSUK << MIPS_SEGCFG_AM_SHIFT) | \ variable 79 or t0, t2 variable 80 mtc0 t0, CP0_SEGCTL variable 83 mfc0 t0, $16, 5 variable 85 or t0, t0, t2 variable 86 mtc0 t0, $16, 5 variable 101 mfc0 t0, CP0_CONFIG, 1 variable 102 bgez t0, 9f variable 103 mfc0 t0, CP0_CONFIG, 2 variable 104 bgez t0, 9f variable 105 mfc0 t0, CP0_CONFIG, 3 variable 106 sll t0, t0, 6 /* SC bit */ variable 107 bgez t0, 9f variable [all...] |
/linux-master/arch/mips/include/asm/mach-ath79/ |
H A D | kernel-entry-init.h | 17 mfc0 t0, CP0_CONFIG 19 and t0, t1 variable 20 ori t0, CONF_CM_CACHABLE_NONCOHERENT variable 21 mtc0 t0, CP0_CONFIG variable
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/linux-master/arch/loongarch/mm/ |
H A D | tlbex.S | 43 la_abs t0, do_page_fault 44 jirl ra, t0, 0 50 csrwr t0, EXCEPTION_KS0 57 csrrd t0, LOONGARCH_CSR_BADV 58 bltz t0, vmalloc_load 63 bstrpick.d ra, t0, PTRS_PER_PGD_BITS + PGDIR_SHIFT - 1, PGDIR_SHIFT 67 bstrpick.d ra, t0, PTRS_PER_PUD_BITS + PUD_SHIFT - 1, PUD_SHIFT 72 bstrpick.d ra, t0, PTRS_PER_PMD_BITS + PMD_SHIFT - 1, PMD_SHIFT 86 bstrpick.d t0, t0, PTRS_PER_PTE_BIT [all...] |
/linux-master/arch/mips/include/asm/mach-loongson64/ |
H A D | kernel-entry-init.h | 23 mfc0 t0, CP0_PAGEGRAIN 24 or t0, (0x1 << 29) variable 25 mtc0 t0, CP0_PAGEGRAIN variable 27 mfc0 t0, CP0_PRID variable 29 andi t1, t0, PRID_IMP_MASK variable 34 andi t0, (PRID_IMP_MASK | PRID_REV_MASK) variable 35 slti t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0) variable 36 bnez t0, 2f variable 39 mfc0 t0, CP0_CONFIG variable 40 or t0, 0x100 variable 41 mtc0 t0, CP0_CONFIG6 variable 55 or t0, (0x1 << 29) variable 56 mtc0 t0, CP0_PAGEGRAIN variable 58 mfc0 t0, CP0_PRID variable 60 andi t1, t0, PRID_IMP_MASK variable 65 andi t0, (PRID_IMP_MASK | PRID_REV_MASK) variable 66 slti t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0) variable 67 bnez t0, 2f variable 70 mfc0 t0, CP0_CONFIG6 variable 71 or t0, 0x100 variable 72 mtc0 t0, CP0_CONFIG6 variable [all...] |
/linux-master/arch/csky/abiv2/ |
H A D | strcmp.S | 18 ldw t0, (a3, 0) 21 cmpne t0, t1 24 tstnbz t0 28 ldw t0, (a3, 4) 30 cmpne t0, t1 32 tstnbz t0 35 ldw t0, (a3, 8) 37 cmpne t0, t1 39 tstnbz t0 42 ldw t0, (a [all...] |
H A D | strcpy.S | 10 andi t0, a1, 3 11 bnez t0, 11f 87 xtrb0 t0, a2 88 st.b t0, (a3) 89 bez t0, 10f 90 xtrb1 t0, a2 91 st.b t0, (a3, 1) 92 bez t0, 10f 93 xtrb2 t0, a2 94 st.b t0, (a [all...] |
/linux-master/arch/riscv/crypto/ |
H A D | sha256-riscv64-zvknha_or_zvknhb-zvkb.S | 115 la t0, K256 116 vle32.v K0, (t0) 117 addi t0, t0, 16 118 vle32.v K1, (t0) 119 addi t0, t0, 16 120 vle32.v K2, (t0) 121 addi t0, t0, 1 [all...] |
/linux-master/arch/alpha/include/uapi/asm/ |
H A D | swab.h | 27 __u64 t0, t1, t2, t3; local 29 t0 = __kernel_inslh(x, 7); /* t0 : 0000000000AABBCC */ 31 t1 |= t0; /* t1 : 000000CCDDAABBCC */ 33 t0 = t1 & 0xFF00FF00; /* t0 : 00000000DD00BB00 */ 35 t1 = t0 + t3; /* t1 : ssssssssDDCCBBAA */
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/linux-master/arch/mips/include/asm/sibyte/ |
H A D | board.h | 25 #define setleds(t0, t1, c0, c1, c2, c3) \ 26 li t0, (LEDS_PHYS|0xa0000000); \ 28 sb t1, 0x18(t0); \ 30 sb t1, 0x10(t0); \ 32 sb t1, 0x08(t0); \ 34 sb t1, 0x00(t0) 36 #define setleds(t0, t1, c0, c1, c2, c3)
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/linux-master/arch/riscv/errata/sifive/ |
H A D | errata_cip_453.S | 25 ADD_SIGN_EXT a0, t0, t1 27 la t0, do_page_fault 29 la t0, do_trap_unknown 31 jr t0 35 ADD_SIGN_EXT a0, t0, t1 36 la t0, do_trap_insn_fault 37 jr t0
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/linux-master/arch/mips/kernel/ |
H A D | bmips_5xxx_init.S | 33 and t0, kva, t2 ; \ 36 9: cache op, 0(t0) ; \ 37 bne t0, t1, 9b ; \ 38 addu t0, linesize ; \ 113 * Trashes: v0, v1, a0, t0 123 move t0, a0 150 move a0, t0 178 move a0, t0 208 * Trashes: v0, v1, a0, t0 216 move t0, a [all...] |
H A D | cps-vec.S | 103 li t0, 0xff 104 sw t0, GCR_CL_COHERENCE_OFS(s1) 109 1: mfc0 t0, CP0_CONFIG 110 ori t0, 0x7 111 xori t0, 0x7 112 or t0, t0, s0 113 mtc0 t0, CP0_CONFIG 117 PTR_LA t0, 1f 118 jr t0 [all...] |