Searched refs:state_mode (Results 1 - 7 of 7) sorted by relevance
/linux-master/drivers/gpu/drm/amd/display/dc/dcn30/ |
H A D | dcn30_dwb_cm.c | 150 uint32_t state_mode; local 154 DWB_OGAM_MODE_CURRENT, &state_mode, 157 if (state_mode == 0) { 159 } else if (state_mode == 2) {
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H A D | dcn30_dpp_cm.c | 60 uint32_t state_mode; local 64 REG_GET(CM_GAMCOR_CONTROL, CM_GAMCOR_MODE_CURRENT, &state_mode); 66 if (state_mode == 2) {//Programmable RAM LUT
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H A D | dcn30_mpc.c | 119 uint32_t state_mode; local 123 REG_GET_2(MPCC_OGAM_CONTROL[mpcc_id], MPCC_OGAM_MODE_CURRENT, &state_mode, 126 switch (state_mode) { 433 uint32_t state_mode; local 436 REG_GET(SHAPER_CONTROL[rmu_idx], MPC_RMU_SHAPER_LUT_MODE_CURRENT, &state_mode); 438 switch (state_mode) {
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H A D | dcn30_dpp.c | 857 uint32_t state_mode; local 860 REG_GET(CM_SHAPER_CONTROL, CM_SHAPER_MODE_CURRENT, &state_mode); 862 switch (state_mode) {
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_mpc.c | 299 uint32_t state_mode; local 302 REG_GET(MPCC_OGAM_LUT_RAM_CONTROL[mpcc_id], MPCC_OGAM_CONFIG_STATUS, &state_mode); 304 switch (state_mode) {
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H A D | dcn20_dpp_cm.c | 499 uint32_t state_mode; local 502 REG_GET(CM_BLNDGAM_LUT_WRITE_EN_MASK, CM_BLNDGAM_CONFIG_STATUS, &state_mode); 504 switch (state_mode) { 592 uint32_t state_mode; local 595 REG_GET(CM_SHAPER_LUT_WRITE_EN_MASK, CM_SHAPER_CONFIG_STATUS, &state_mode); 597 switch (state_mode) {
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn32/ |
H A D | dcn32_mpc.c | 304 uint32_t state_mode; local 307 REG_GET(MPCC_MCM_SHAPER_CONTROL[mpcc_id], MPCC_MCM_SHAPER_MODE_CURRENT, &state_mode); 309 switch (state_mode) {
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