Searched refs:sr1 (Results 1 - 24 of 24) sorted by relevance

/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_vga.c31 u8 sr1; local
39 sr1 = inb(VGA_SEQ_D);
40 outb(sr1 | VGA_SR01_SCREEN_OFF, VGA_SEQ_D);
/linux-master/arch/parisc/include/asm/
H A Dkgdb.h46 unsigned long sr1; member in struct:parisc_gdb_regs
H A Dasmregs.h70 sr1: .reg %sr1
H A Dassembly.h464 SAVE_SP (%sr1, PT_SR1 (\regs))
503 REST_SP (%sr1, PT_SR1 (\regs))
/linux-master/arch/parisc/kernel/
H A Dpacache.S79 mtsp %r20, %sr1
85 pitlbe %r0(%sr1, %r28)
86 pitlbe,m %arg1(%sr1, %r28) /* Last pitlbe and addr adjust */
94 mtsp %r20, %sr1
100 pitlbe,m %arg1(%sr1, %r28) /* pitlbe for one loop */
123 mtsp %r20, %sr1
129 pdtlbe %r0(%sr1, %r28)
130 pdtlbe,m %arg1(%sr1, %r28) /* Last pdtlbe and addr adjust */
138 mtsp %r20, %sr1
144 pdtlbe,m %arg1(%sr1,
[all...]
H A Dentry.S1194 mfsp %sr1,t1 /* Save sr1 so we can use it in tlb inserts */
1195 mtsp spc,%sr1
1197 idtlba pte,(%sr1,va)
1198 idtlbp prot,(%sr1,va)
1200 mtsp t1, %sr1 /* Restore sr1 */
1228 mfsp %sr1,t1 /* Save sr1 so we can use it in tlb inserts */
1229 mtsp spc,%sr1
[all...]
H A Dkgdb.c73 gr->sr1 = regs->sr[1];
104 regs->sr[1] = gr->sr1;
H A Dhead.S284 mtsp %r0,%sr1
H A Dsyscall.S306 mfsp %sr1,%r2
/linux-master/arch/powerpc/platforms/ps3/
H A Dspu.c84 * @sr1: Cached mfc_sr1 register.
90 u64 sr1; member in struct:priv1_cache
351 spu_pdata(spu)->cache.sr1 = 0x33;
532 static void mfc_sr1_set(struct spu *spu, u64 sr1) argument
539 BUG_ON((sr1 & allowed) != (spu_pdata(spu)->cache.sr1 & allowed));
541 spu_pdata(spu)->cache.sr1 = sr1;
545 spu_pdata(spu)->cache.sr1);
550 return spu_pdata(spu)->cache.sr1;
[all...]
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramnv40.c75 u8 sr1[2]; local
85 sr1[i] = nvkm_rd08(device, 0x0c03c5 + (i * 0x2000));
86 if (!(sr1[i] & 0x20))
112 nvkm_wr08(device, 0x0c03c5 + (i * 0x2000), sr1[i] | 0x20);
172 nvkm_wr08(device, 0x0c03c5 + (i * 0x2000), sr1[i]);
/linux-master/arch/powerpc/platforms/cell/spufs/
H A Dhw_ops.c228 u64 sr1; local
231 sr1 = spu_mfc_sr1_get(spu) | MFC_STATE1_MASTER_RUN_CONTROL_MASK;
232 spu_mfc_sr1_set(spu, sr1);
239 u64 sr1; local
242 sr1 = spu_mfc_sr1_get(spu) & ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
243 spu_mfc_sr1_set(spu, sr1);
H A Drun.c86 u64 sr1; local
125 sr1 = spu_mfc_sr1_get(ctx->spu);
126 sr1 &= ~MFC_STATE1_PROBLEM_STATE_MASK;
127 spu_mfc_sr1_set(ctx->spu, sr1);
169 sr1 |= MFC_STATE1_PROBLEM_STATE_MASK;
170 spu_mfc_sr1_set(ctx->spu, sr1);
H A Dbacking_ops.c298 u64 sr1; local
301 sr1 = csa->priv1.mfc_sr1_RW | MFC_STATE1_MASTER_RUN_CONTROL_MASK;
302 csa->priv1.mfc_sr1_RW = sr1;
309 u64 sr1; local
312 sr1 = csa->priv1.mfc_sr1_RW & ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
313 csa->priv1.mfc_sr1_RW = sr1;
/linux-master/arch/powerpc/platforms/cell/
H A Dspu_priv1_mmio.c100 static void mfc_sr1_set(struct spu *spu, u64 sr1) argument
102 out_be64(&spu->priv1->mfc_sr1_RW, sr1);
/linux-master/arch/powerpc/include/asm/
H A Dspu_priv1.h31 void (*mfc_sr1_set) (struct spu *spu, u64 sr1);
111 spu_mfc_sr1_set (struct spu *spu, u64 sr1) argument
113 spu_priv1_ops->mfc_sr1_set(spu, sr1);
/linux-master/drivers/gpu/drm/gma500/
H A Dcdv_device.c25 u8 sr1; local
31 sr1 = inb(VGA_SR_DATA);
32 outb(sr1 | 1<<5, VGA_SR_DATA);
/linux-master/drivers/mtd/spi-nor/
H A Dcore.c826 * @sr1: byte value to be written to the Status Register.
830 static int spi_nor_write_sr1_and_check(struct spi_nor *nor, u8 sr1) argument
834 nor->bouncebuf[0] = sr1;
844 if (nor->bouncebuf[0] != sr1) {
858 * @sr1: byte value to be written to the Status Register 1.
862 static int spi_nor_write_16bit_sr_and_check(struct spi_nor *nor, u8 sr1) argument
895 sr_cr[0] = sr1;
905 if (sr1 != sr_cr[0]) {
985 * @sr1: byte value to be written to the Status Register.
989 int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1) argument
[all...]
H A Dcore.h634 int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1);
/linux-master/drivers/mtd/devices/
H A Dst_spi_fsm.c1393 uint8_t sr1, cr1, dyb; local
1461 stfsm_read_status(fsm, SPINOR_OP_RDSR, &sr1, 1);
1462 sta_wr = ((uint16_t)cr1 << 8) | sr1;
1478 uint8_t sr1, sr2; local
1505 stfsm_read_status(fsm, SPINOR_OP_RDSR, &sr1, 1);
1506 sr_wr = ((uint16_t)sr2 << 8) | sr1;
/linux-master/kernel/locking/
H A Dlockdep_proc.c202 sr1 = debug_atomic_read(redundant_softirqs_on), local
226 seq_printf(m, " redundant softirq ons: %11llu\n", sr1);
/linux-master/arch/parisc/lib/
H A Dlusercopy.S58 * - sr1 already contains space of source region
97 srcspc = sr1
/linux-master/drivers/tty/serial/
H A Dfsl_lpuart.c846 unsigned char sr1 = readb(port->membase + UARTSR1); local
852 if (sr1 & UARTSR1_TC && sfifo & UARTSFIFO_TXEMPT)
/linux-master/include/linux/platform_data/
H A Dcros_ec_commands.h1694 uint8_t sr1, sr2; member in struct:ec_response_flash_spi_info

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