Searched refs:simulate (Results 1 - 21 of 21) sorted by relevance

/linux-master/arch/arm64/kernel/probes/
H A DMakefile4 simulate-insn.o
6 simulate-insn.o
H A Duprobes.c52 auprobe->simulate = true;
108 if (!auprobe->simulate)
/linux-master/arch/csky/kernel/probes/
H A DMakefile2 obj-$(CONFIG_KPROBES) += kprobes.o decode-insn.o simulate-insn.o
5 obj-$(CONFIG_UPROBES) += uprobes.o decode-insn.o simulate-insn.o
H A Duprobes.c38 auprobe->simulate = true;
89 if (!auprobe->simulate)
/linux-master/arch/riscv/kernel/probes/
H A DMakefile2 obj-$(CONFIG_KPROBES) += kprobes.o decode-insn.o simulate-insn.o
5 obj-$(CONFIG_UPROBES) += uprobes.o decode-insn.o simulate-insn.o
H A Duprobes.c45 auprobe->simulate = true;
49 auprobe->simulate = false;
96 if (!auprobe->simulate)
173 /* Add ebreak behind opcode to simulate singlestep */
/linux-master/arch/csky/include/asm/
H A Duprobes.h27 bool simulate; member in struct:arch_uprobe
/linux-master/arch/arm64/include/asm/
H A Duprobes.h30 bool simulate; member in struct:arch_uprobe
/linux-master/arch/loongarch/include/asm/
H A Duprobes.h21 bool simulate; member in struct:arch_uprobe
/linux-master/arch/arm/include/asm/
H A Duprobes.h31 bool simulate; member in struct:arch_uprobe
/linux-master/arch/riscv/include/asm/
H A Duprobes.h34 bool simulate; member in struct:arch_uprobe
/linux-master/arch/loongarch/kernel/
H A Duprobes.c27 auprobe->simulate = true;
30 auprobe->simulate = false;
57 if (auprobe->simulate)
88 if (!auprobe->simulate)
/linux-master/arch/powerpc/platforms/pseries/
H A Dcmm.c50 static bool __read_mostly simulate; variable
75 module_param_named(simulate, simulate, bool, 0444);
76 MODULE_PARM_DESC(simulate, "Enable simulation mode (no communication with hw).");
97 if (unlikely(simulate))
117 if (unlikely(simulate))
243 if (likely(!simulate)) {
412 if (!simulate)
572 if (!firmware_has_feature(FW_FEATURE_CMO) && !simulate)
/linux-master/drivers/usb/cdns3/
H A Ddrd.h30 __le32 simulate; member in struct:cdns3_otg_regs
54 __le32 simulate; member in struct:cdns3_otg_legacy_regs
71 __le32 simulate; member in struct:cdnsp_otg_regs
H A Ddrd.c416 writel(1, &cdns->otg_v0_regs->simulate);
435 writel(1, &cdns->otg_v1_regs->simulate);
496 if (!(readl(&cdns->otg_v0_regs->simulate) & BIT(0)))
499 if (!(readl(&cdns->otg_v1_regs->simulate) & BIT(0)))
/linux-master/arch/arm/probes/uprobes/
H A Dcore.c50 if (!auprobe->simulate)
94 auprobe->simulate = true;
/linux-master/arch/xtensa/kernel/
H A Dvectors.S678 j _KernelExceptionVector # simulate kernel vector exception
680 j _UserExceptionVector # simulate user vector exception
/linux-master/arch/arm/kernel/
H A Dentry-armv.S264 @ If a kprobe is about to simulate a "stmdb sp..." instruction,
/linux-master/arch/m68k/fpsp040/
H A Dsetox.S169 | raised, to simulate that exception cost to much than the
/linux-master/arch/sparc/kernel/
H A Dentry.S1244 srl %o3, 1, %o4 ! simulate a save
/linux-master/arch/m68k/ifpsp060/src/
H A Dfplsp.S6828 # should always be raised, to simulate that exception #

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