Searched refs:seqno (Results 1 - 25 of 246) sorted by relevance

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/linux-master/drivers/gpu/drm/vc4/
H A Dvc4_trace.h18 TP_PROTO(struct drm_device *dev, uint64_t seqno, uint64_t timeout),
19 TP_ARGS(dev, seqno, timeout),
23 __field(u64, seqno)
29 __entry->seqno = seqno;
33 TP_printk("dev=%u, seqno=%llu, timeout=%llu",
34 __entry->dev, __entry->seqno, __entry->timeout)
38 TP_PROTO(struct drm_device *dev, uint64_t seqno),
39 TP_ARGS(dev, seqno),
43 __field(u64, seqno)
[all...]
H A Dvc4_fence.c41 return vc4->finished_seqno >= f->seqno;
/linux-master/security/selinux/include/
H A Davc_ss.h13 int avc_ss_reset(u32 seqno);
/linux-master/drivers/gpu/drm/xe/
H A Dxe_gt_tlb_invalidation_types.h22 /** @seqno: seqno of TLB invalidation to signal fence one */
23 int seqno; member in struct:xe_gt_tlb_invalidation_fence
H A Dxe_gt_tlb_invalidation.c34 xe_gt_err(gt, "TLB invalidation fence timeout, seqno=%d recv=%d",
35 fence->seqno, gt->tlb_invalidation.seqno_recv);
60 gt->tlb_invalidation.seqno = 1;
112 if (gt->tlb_invalidation.seqno == 1)
115 pending_seqno = gt->tlb_invalidation.seqno - 1;
126 static bool tlb_invalidation_seqno_past(struct xe_gt *gt, int seqno) argument
130 if (seqno - seqno_recv < -(TLB_INVALIDATION_SEQNO_MAX / 2))
133 if (seqno - seqno_recv > (TLB_INVALIDATION_SEQNO_MAX / 2))
136 return seqno_recv >= seqno;
144 int seqno; local
321 xe_gt_tlb_invalidation_wait(struct xe_gt *gt, int seqno) argument
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H A Dxe_preempt_fence.h15 u64 context, u32 seqno);
23 u64 context, u32 seqno);
H A Dxe_gt_tlb_invalidation.h23 int xe_gt_tlb_invalidation_wait(struct xe_gt *gt, int seqno);
H A Dxe_preempt_fence.c109 * @seqno: The dma-fence seqno used for arming.
119 u64 context, u32 seqno)
124 &q->compute.lock, context, seqno);
133 * @seqno: The dma-fence seqno used for arming.
144 u64 context, u32 seqno)
152 return xe_preempt_fence_arm(pfence, q, context, seqno);
118 xe_preempt_fence_arm(struct xe_preempt_fence *pfence, struct xe_exec_queue *q, u64 context, u32 seqno) argument
143 xe_preempt_fence_create(struct xe_exec_queue *q, u64 context, u32 seqno) argument
/linux-master/drivers/media/pci/saa7164/
H A Dsaa7164-cmd.c22 ret = dev->cmds[i].seqno;
31 static void saa7164_cmd_free_seqno(struct saa7164_dev *dev, u8 seqno) argument
34 if ((dev->cmds[seqno].inuse == 1) &&
35 (dev->cmds[seqno].seqno == seqno)) {
36 dev->cmds[seqno].inuse = 0;
37 dev->cmds[seqno].signalled = 0;
38 dev->cmds[seqno].timeout = 0;
43 static void saa7164_cmd_timeout_seqno(struct saa7164_dev *dev, u8 seqno) argument
53 saa7164_cmd_timeout_get(struct saa7164_dev *dev, u8 seqno) argument
244 saa7164_cmd_wait(struct saa7164_dev *dev, u8 seqno) argument
298 saa7164_cmd_signal(struct saa7164_dev *dev, u8 seqno) argument
[all...]
/linux-master/drivers/gpu/drm/v3d/
H A Dv3d_trace.h39 uint64_t seqno,
41 TP_ARGS(dev, is_render, seqno, ctnqba, ctnqea),
46 __field(u64, seqno)
54 __entry->seqno = seqno;
59 TP_printk("dev=%u, %s, seqno=%llu, 0x%08x..0x%08x",
62 __entry->seqno,
69 uint64_t seqno),
70 TP_ARGS(dev, seqno),
74 __field(u64, seqno)
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H A Dv3d_fence.c16 fence->seqno = ++v3d->queue[queue].emit_seqno;
18 v3d->queue[queue].fence_context, fence->seqno);
/linux-master/drivers/gpu/drm/i915/
H A Di915_syncmap.h34 int i915_syncmap_set(struct i915_syncmap **root, u64 id, u32 seqno);
35 bool i915_syncmap_is_later(struct i915_syncmap **root, u64 id, u32 seqno);
H A Di915_syncmap.c37 * context id to the last u32 fence seqno waited upon from that context.
46 * A leaf holds an array of u32 seqno, and has height 0. The bitmap field
47 * allows us to store whether a particular seqno is valid (i.e. allows us
79 DECLARE_FLEX_ARRAY(u32, seqno);
99 return p->seqno;
141 * @seqno: the sequence number along the other timeline
148 * Returns true if the two timelines are already synchronised wrt to @seqno,
151 bool i915_syncmap_is_later(struct i915_syncmap **root, u64 id, u32 seqno) argument
192 return seqno_later(__sync_seqno(p)[idx], seqno);
200 p = kmalloc(struct_size(p, seqno, KSYNCMA
211 __sync_set_seqno(struct i915_syncmap *p, u64 id, u32 seqno) argument
227 __sync_set(struct i915_syncmap **root, u64 id, u32 seqno) argument
350 i915_syncmap_set(struct i915_syncmap **root, u64 id, u32 seqno) argument
[all...]
/linux-master/drivers/gpu/drm/virtio/
H A Dvirtgpu_trace.h12 TP_PROTO(struct virtqueue *vq, struct virtio_gpu_ctrl_hdr *hdr, u32 seqno),
13 TP_ARGS(vq, hdr, seqno),
23 __field(u32, seqno)
34 __entry->seqno = seqno;
36 TP_printk("vdev=%d vq=%u name=%s type=0x%x flags=0x%x fence_id=%llu ctx_id=%u num_free=%u seqno=%u",
39 __entry->ctx_id, __entry->num_free, __entry->seqno)
43 TP_PROTO(struct virtqueue *vq, struct virtio_gpu_ctrl_hdr *hdr, u32 seqno),
44 TP_ARGS(vq, hdr, seqno)
48 TP_PROTO(struct virtqueue *vq, struct virtio_gpu_ctrl_hdr *hdr, u32 seqno),
[all...]
/linux-master/drivers/gpu/drm/i915/gt/
H A Dintel_tlb.h14 void intel_gt_invalidate_tlb_full(struct intel_gt *gt, u32 seqno);
21 return seqprop_sequence(&gt->tlb.seqno);
H A Dintel_timeline.h46 u64 context, u32 seqno)
48 return i915_syncmap_set(&tl->sync, context, seqno);
54 return __intel_timeline_sync_set(tl, fence->context, fence->seqno);
58 u64 context, u32 seqno)
60 return i915_syncmap_is_later(&tl->sync, context, seqno);
66 return __intel_timeline_sync_is_later(tl, fence->context, fence->seqno);
74 u32 *seqno);
45 __intel_timeline_sync_set(struct intel_timeline *tl, u64 context, u32 seqno) argument
57 __intel_timeline_sync_is_later(struct intel_timeline *tl, u64 context, u32 seqno) argument
H A Dintel_tlb.c113 static bool tlb_seqno_passed(const struct intel_gt *gt, u32 seqno) argument
118 return (s32)(cur - ALIGN(seqno, 2)) > 0;
121 void intel_gt_invalidate_tlb_full(struct intel_gt *gt, u32 seqno) argument
131 if (tlb_seqno_passed(gt, seqno))
138 if (tlb_seqno_passed(gt, seqno))
154 write_seqcount_invalidate(&gt->tlb.seqno);
163 seqcount_mutex_init(&gt->tlb.seqno, &gt->tlb.invalidate_lock);
/linux-master/include/trace/events/
H A Ddma_fence.h22 __field(unsigned int, seqno)
29 __entry->seqno = fence->seqno;
32 TP_printk("driver=%s timeline=%s context=%u seqno=%u",
34 __entry->seqno)
/linux-master/drivers/gpu/drm/lima/
H A Dlima_trace.h19 __field(unsigned int, seqno)
26 __entry->seqno = task->base.s_fence->finished.seqno;
30 TP_printk("task=%llu, context=%u seqno=%u pipe=%s",
31 __entry->task_id, __entry->context, __entry->seqno,
/linux-master/net/dccp/ccids/lib/
H A Dpacket_history.h33 * @seqno: sequence number of this entry
34 * @stamp: send time of packet with sequence number @seqno
38 u64 seqno; member in struct:tfrc_tx_hist_entry
43 tfrc_tx_hist_find_entry(struct tfrc_tx_hist_entry *head, u64 seqno) argument
45 while (head != NULL && head->seqno != seqno)
50 int tfrc_tx_hist_add(struct tfrc_tx_hist_entry **headp, u64 seqno);
97 * tfrc_rx_hist_last_rcv - entry with highest-received-seqno so far
115 * tfrc_rx_hist_loss_prev - entry with highest-received-seqno before loss was detected
/linux-master/drivers/dma-buf/
H A Ddma-fence-chain.c80 * dma_fence_chain_find_seqno - find fence chain node by seqno
82 * @seqno: the sequence number to search for
90 int dma_fence_chain_find_seqno(struct dma_fence **pfence, uint64_t seqno) argument
94 if (!seqno)
98 if (!chain || chain->base.seqno < seqno)
103 to_dma_fence_chain(*pfence)->prev_seqno < seqno)
236 * @seqno: the sequence number to use for the fence chain
244 uint64_t seqno)
255 if (prev_chain && __dma_fence_is_later(seqno, pre
241 dma_fence_chain_init(struct dma_fence_chain *chain, struct dma_fence *prev, struct dma_fence *fence, uint64_t seqno) argument
[all...]
/linux-master/include/uapi/linux/
H A Dselinux_netlink.h48 __u32 seqno; member in struct:selnl_msg_policyload
/linux-master/drivers/gpu/drm/radeon/
H A Dradeon_trace.h127 TP_PROTO(struct drm_device *dev, int ring, u32 seqno),
129 TP_ARGS(dev, ring, seqno),
134 __field(u32, seqno)
140 __entry->seqno = seqno;
143 TP_printk("dev=%u, ring=%d, seqno=%u",
144 __entry->dev, __entry->ring, __entry->seqno)
149 TP_PROTO(struct drm_device *dev, int ring, u32 seqno),
151 TP_ARGS(dev, ring, seqno)
156 TP_PROTO(struct drm_device *dev, int ring, u32 seqno),
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/linux-master/drivers/gpu/drm/i915/selftests/
H A Di915_syncmap.c146 static int check_seqno(struct i915_syncmap *leaf, unsigned int idx, u32 seqno) argument
154 if (__sync_seqno(leaf)[idx] != seqno) {
155 pr_err("%s: seqno[%d], found %x, expected %x\n",
156 __func__, idx, __sync_seqno(leaf)[idx], seqno);
163 static int check_one(struct i915_syncmap **sync, u64 context, u32 seqno) argument
167 err = i915_syncmap_set(sync, context, seqno);
189 err = check_seqno((*sync), ilog2((*sync)->bitmap), seqno);
193 if (!i915_syncmap_is_later(sync, context, seqno)) {
194 pr_err("Lookup of first context=%llx/seqno=%x failed!\n",
195 context, seqno);
238 check_leaf(struct i915_syncmap **sync, u64 context, u32 seqno) argument
548 u32 seqno; local
[all...]
/linux-master/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_irq.c120 static bool vmw_fifo_idle(struct vmw_private *dev_priv, uint32_t seqno) argument
128 uint32_t seqno = vmw_fence_read(dev_priv); local
130 if (dev_priv->last_read_seqno != seqno) {
131 dev_priv->last_read_seqno = seqno;
137 uint32_t seqno)
141 if (likely(dev_priv->last_read_seqno - seqno < VMW_FENCE_WRAP))
145 if (likely(dev_priv->last_read_seqno - seqno < VMW_FENCE_WRAP))
148 if (!vmw_has_fences(dev_priv) && vmw_fifo_idle(dev_priv, seqno))
152 * Then check if the seqno is higher than what we've actually
156 ret = ((atomic_read(&dev_priv->marker_seq) - seqno)
136 vmw_seqno_passed(struct vmw_private *dev_priv, uint32_t seqno) argument
162 vmw_fallback_wait(struct vmw_private *dev_priv, bool lazy, bool fifo_idle, uint32_t seqno, bool interruptible, unsigned long timeout) argument
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