Searched refs:sdma_cntl (Results 1 - 9 of 9) sorted by relevance
| /linux-master/drivers/gpu/drm/amd/amdgpu/ |
| H A D | sdma_v2_4.c | 992 u32 sdma_cntl; local
998 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET);
999 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0);
1000 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl);
1003 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET);
1004 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1);
1005 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl);
1014 sdma_cntl
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| H A D | sdma_v3_0.c | 1328 u32 sdma_cntl; local
1334 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET);
1335 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0);
1336 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl);
1339 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET);
1340 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1);
1341 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl);
1350 sdma_cntl
[all...] |
| H A D | cik_sdma.c | 1101 u32 sdma_cntl; local
1107 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET);
1108 sdma_cntl &= ~SDMA0_CNTL__TRAP_ENABLE_MASK;
1109 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl);
1112 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET);
1113 sdma_cntl |= SDMA0_CNTL__TRAP_ENABLE_MASK;
1114 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl);
1123 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET);
1124 sdma_cntl &= ~SDMA0_CNTL__TRAP_ENABLE_MASK;
1125 WREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET, sdma_cntl);
[all...] |
| H A D | si_dma.c | 585 u32 sdma_cntl; local
591 sdma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET);
592 sdma_cntl &= ~TRAP_ENABLE;
593 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl);
596 sdma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET);
597 sdma_cntl |= TRAP_ENABLE;
598 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl);
607 sdma_cntl = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET);
608 sdma_cntl &= ~TRAP_ENABLE;
609 WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, sdma_cntl);
[all...] |
| H A D | sdma_v4_4_2.c | 1507 u32 sdma_cntl; local
1509 sdma_cntl = RREG32_SDMA(type, regSDMA_CNTL);
1510 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA_CNTL, TRAP_ENABLE,
1512 WREG32_SDMA(type, regSDMA_CNTL, sdma_cntl);
1603 u32 sdma_cntl; local
1605 sdma_cntl = RREG32_SDMA(type, regSDMA_CNTL);
1606 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA_CNTL, DRAM_ECC_INT_ENABLE,
1608 WREG32_SDMA(type, regSDMA_CNTL, sdma_cntl);
[all...] |
| H A D | sdma_v5_0.c | 1526 u32 sdma_cntl; local
1533 sdma_cntl = RREG32(reg_offset);
1534 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE,
1536 WREG32(reg_offset, sdma_cntl);
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| H A D | sdma_v6_0.c | 1400 u32 sdma_cntl; local
1405 sdma_cntl = RREG32(reg_offset);
1406 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE,
1408 WREG32(reg_offset, sdma_cntl);
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| H A D | sdma_v5_2.c | 1381 u32 sdma_cntl; local
1385 sdma_cntl = RREG32(reg_offset);
1386 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE,
1388 WREG32(reg_offset, sdma_cntl);
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| H A D | sdma_v4_0.c | 2006 u32 sdma_cntl; local
2008 sdma_cntl = RREG32_SDMA(type, mmSDMA0_CNTL);
2009 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE,
2011 WREG32_SDMA(type, mmSDMA0_CNTL, sdma_cntl);
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