/linux-master/drivers/clk/mvebu/ |
H A D | orion.c | 28 static u32 __init mv88f5181_get_tclk_freq(void __iomem *sar) argument 30 u32 opt = (readl(sar) >> SAR_MV88F5181_TCLK_FREQ) & 45 static u32 __init mv88f5181_get_cpu_freq(void __iomem *sar) argument 47 u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) & 59 static void __init mv88f5181_get_clk_ratio(void __iomem *sar, int id, argument 62 u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) & 98 static u32 __init mv88f5182_get_tclk_freq(void __iomem *sar) argument 100 u32 opt = (readl(sar) >> SAR_MV88F5182_TCLK_FREQ) & 113 static u32 __init mv88f5182_get_cpu_freq(void __iomem *sar) argument 115 u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FRE 127 mv88f5182_get_clk_ratio(void __iomem *sar, int id, int *mult, int *div) argument 163 mv88f5281_get_tclk_freq(void __iomem *sar) argument 172 mv88f5281_get_cpu_freq(void __iomem *sar) argument 184 mv88f5281_get_clk_ratio(void __iomem *sar, int id, int *mult, int *div) argument 223 mv88f6183_get_tclk_freq(void __iomem *sar) argument 238 mv88f6183_get_cpu_freq(void __iomem *sar) argument 250 mv88f6183_get_clk_ratio(void __iomem *sar, int id, int *mult, int *div) argument [all...] |
H A D | common.h | 28 u32 (*get_tclk_freq)(void __iomem *sar); 29 u32 (*get_cpu_freq)(void __iomem *sar); 30 void (*get_clk_ratio)(void __iomem *sar, int id, int *mult, int *div); 31 u32 (*get_refclk_freq)(void __iomem *sar); 32 bool (*is_sscg_enabled)(void __iomem *sar);
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H A D | armada-39x.c | 45 static u32 __init armada_39x_get_tclk_freq(void __iomem *sar) argument 49 tclk_freq_select = ((readl(sar + SARL) >> SARL_A390_TCLK_FREQ_OPT) & 68 static u32 __init armada_39x_get_cpu_freq(void __iomem *sar) argument 72 cpu_freq_select = ((readl(sar + SARL) >> SARL_A390_CPU_DDR_L2_FREQ_OPT) & 92 void __iomem *sar, int id, int *mult, int *div) 110 static u32 __init armada_39x_refclk_ratio(void __iomem *sar) argument 112 if (readl(sar + SARH) & SARH_A390_REFCLK_FREQ) 91 armada_39x_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
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H A D | armada-375.c | 50 static u32 __init armada_375_get_tclk_freq(void __iomem *sar) argument 54 tclk_freq_select = ((readl(sar) >> SAR1_A375_TCLK_FREQ_OPT) & 71 static u32 __init armada_375_get_cpu_freq(void __iomem *sar) argument 75 cpu_freq_select = ((readl(sar) >> SAR1_A375_CPU_DDR_L2_FREQ_OPT) & 115 void __iomem *sar, int id, int *mult, int *div) 117 u32 opt = ((readl(sar) >> SAR1_A375_CPU_DDR_L2_FREQ_OPT) & 114 armada_375_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
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H A D | armada-38x.c | 37 static u32 __init armada_38x_get_tclk_freq(void __iomem *sar) argument 41 tclk_freq_select = ((readl(sar) >> SAR_A380_TCLK_FREQ_OPT) & 54 static u32 __init armada_38x_get_cpu_freq(void __iomem *sar) argument 58 cpu_freq_select = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) & 99 void __iomem *sar, int id, int *mult, int *div) 101 u32 opt = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) & 98 armada_38x_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
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H A D | armada-370.c | 45 static u32 __init a370_get_tclk_freq(void __iomem *sar) argument 49 tclk_freq_select = ((readl(sar) >> SARL_A370_TCLK_FREQ_OPT) & 64 static u32 __init a370_get_cpu_freq(void __iomem *sar) argument 69 cpu_freq_select = ((readl(sar) >> SARL_A370_PCLK_FREQ_OPT) & 114 void __iomem *sar, int id, int *mult, int *div) 116 u32 opt = ((readl(sar) >> SARL_A370_FAB_FREQ_OPT) & 135 static bool a370_is_sscg_enabled(void __iomem *sar) argument 137 return !(readl(sar) & SARL_A370_SSCG_ENABLE); 113 a370_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
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H A D | dove.c | 87 static u32 __init dove_get_tclk_freq(void __iomem *sar) argument 89 u32 opt = (readl(sar) >> SAR_DOVE_TCLK_FREQ) & 106 static u32 __init dove_get_cpu_freq(void __iomem *sar) argument 108 u32 opt = (readl(sar) >> SAR_DOVE_CPU_FREQ) & 126 void __iomem *sar, int id, int *mult, int *div) 131 u32 opt = (readl(sar) >> SAR_DOVE_L2_RATIO) & 139 u32 opt = (readl(sar) >> SAR_DOVE_DDR_RATIO) & 125 dove_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
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H A D | armada-xp.c | 48 static u32 __init axp_get_tclk_freq(void __iomem *sar) argument 68 static u32 __init axp_get_cpu_freq(void __iomem *sar) argument 73 cpu_freq_select = ((readl(sar + SARL) >> SARL_AXP_PCLK_FREQ_OPT) & 79 cpu_freq_select |= (((readl(sar + SARH) >> SARH_AXP_PCLK_FREQ_OPT) & 124 void __iomem *sar, int id, int *mult, int *div) 126 u32 opt = ((readl(sar + SARL) >> SARL_AXP_FAB_FREQ_OPT) & 132 opt |= (((readl(sar + SARH) >> SARH_AXP_FAB_FREQ_OPT) & 123 axp_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
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H A D | mv98dx3236.c | 44 static u32 __init mv98dx3236_get_tclk_freq(void __iomem *sar) argument 68 static u32 __init mv98dx3236_get_cpu_freq(void __iomem *sar) argument 73 cpu_freq_select = ((readl(sar) >> SAR1_MV98DX3236_CPU_DDR_MPLL_FREQ_OPT) & 118 void __iomem *sar, int id, int *mult, int *div) 120 u32 opt = ((readl(sar) >> SAR1_MV98DX3236_CPU_DDR_MPLL_FREQ_OPT) & 117 mv98dx3236_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
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H A D | kirkwood.c | 86 static u32 __init kirkwood_get_tclk_freq(void __iomem *sar) argument 88 u32 opt = (readl(sar) >> SAR_KIRKWOOD_TCLK_FREQ) & 108 static u32 __init kirkwood_get_cpu_freq(void __iomem *sar) argument 110 u32 opt = SAR_KIRKWOOD_CPU_FREQ(readl(sar)); 127 void __iomem *sar, int id, int *mult, int *div) 132 u32 opt = SAR_KIRKWOOD_L2_RATIO(readl(sar)); 139 u32 opt = (readl(sar) >> SAR_KIRKWOOD_DDR_RATIO) & 155 static u32 __init mv88f6180_get_cpu_freq(void __iomem *sar) argument 157 u32 opt = (readl(sar) >> SAR_MV88F6180_CLK) & SAR_MV88F6180_CLK_MASK; 167 void __iomem *sar, in 126 kirkwood_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument 166 mv88f6180_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument 188 mv98dx1135_get_tclk_freq(void __iomem *sar) argument [all...] |
/linux-master/drivers/net/wireless/realtek/rtw88/ |
H A D | sar.c | 5 #include "sar.h" 12 const struct rtw_sar *sar = &hal->sar; local 14 switch (sar->src) { 16 rtw_warn(rtwdev, "unknown SAR source: %d\n", sar->src); 21 return sar->cfg[arg->path][arg->rs].common[arg->sar_band]; 28 struct rtw_sar *sar = &hal->sar; local 30 if (sar->src != RTW_SAR_SOURCE_NONE && new->src != sar 41 rtw_sar_to_phy(struct rtw_dev *rtwdev, u8 fct, s32 sar, const struct rtw_sar_arg *arg) argument 73 rtw_set_sar_specs(struct rtw_dev *rtwdev, const struct cfg80211_sar_specs *sar) argument [all...] |
H A D | sar.h | 22 const struct cfg80211_sar_specs *sar);
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/linux-master/arch/parisc/include/uapi/asm/ |
H A D | ptrace.h | 35 unsigned long sar; /* CR11 */ member in struct:pt_regs 56 unsigned long sar; /* CR11 */ member in struct:user_regs_struct
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/linux-master/sound/soc/sof/intel/ |
H A D | telemetry.h | 24 u32 sar; member in struct:xtensa_arch_block
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H A D | telemetry.c | 82 xoops->sar = block->sar;
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/linux-master/arch/parisc/include/asm/ |
H A D | kgdb.h | 33 unsigned long sar; member in struct:parisc_gdb_regs
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/linux-master/drivers/net/wireless/realtek/rtw89/ |
H A D | sar.h | 25 const struct cfg80211_sar_specs *sar);
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H A D | sar.c | 9 #include "sar.h" 91 struct rtw89_sar_cfg_common *rtwsar = &rtwdev->sar.cfg_common; 148 _d->sar._cfg_name = *(_cfg_data); \ 149 _d->sar.src = _s; \ 189 const enum rtw89_sar_sources src = rtwdev->sar.src; 228 const enum rtw89_sar_sources src = rtwdev->sar.src; 272 const struct rtw89_sar_cfg_common *sar) 279 src = rtwdev->sar.src; 286 rtw89_sar_set_src(rtwdev, RTW89_SAR_SOURCE_COMMON, cfg_common, sar); 317 const struct cfg80211_sar_specs *sar) 271 rtw89_apply_sar_common(struct rtw89_dev *rtwdev, const struct rtw89_sar_cfg_common *sar) argument 316 rtw89_ops_set_sar_specs(struct ieee80211_hw *hw, const struct cfg80211_sar_specs *sar) argument [all...] |
/linux-master/arch/sh/drivers/dma/ |
H A D | dma-g2.c | 97 if (chan->sar & 31) { 98 printk("g2dma: unaligned source 0x%lx\n", chan->sar); 117 flush_icache_range((unsigned long)chan->sar, chan->count); 122 g2_dma->channel[chan_nr].root_addr = chan->sar & 0x1fffffe0; 136 pr_debug("count, sar, dar, mode, ctrl, chan, xfer: %ld, 0x%08lx, "
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/linux-master/include/sound/sof/ |
H A D | xtensa.h | 41 uint32_t sar; member in struct:sof_ipc_dsp_oops_xtensa
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/linux-master/arch/xtensa/include/uapi/asm/ |
H A D | ptrace.h | 53 __u32 sar; member in struct:user_pt_regs
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/linux-master/drivers/dma/dw-edma/ |
H A D | dw-hdma-v0-regs.h | 47 } sar; member in struct:dw_hdma_v0_ch_regs 107 } sar; member in struct:dw_hdma_v0_lli
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H A D | dw-hdma-v0-core.c | 156 u32 control, u32 size, u64 sar, u64 dar) 165 lli->sar.reg = sar; 172 writeq(sar, &lli->sar.reg); 215 child->sar, child->dar); 155 dw_hdma_v0_write_ll_data(struct dw_edma_chunk *chunk, int i, u32 control, u32 size, u64 sar, u64 dar) argument
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/linux-master/drivers/net/wireless/mediatek/mt76/mt76x0/ |
H A D | main.c | 35 const struct cfg80211_sar_specs *sar) 45 err = mt76_init_sar_power(hw, sar); 34 mt76x0_set_sar_specs(struct ieee80211_hw *hw, const struct cfg80211_sar_specs *sar) argument
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/linux-master/arch/parisc/kernel/ |
H A D | signal32.c | 98 /* Load the upper half for sar */ 100 regs->sar = ((u64)compat_regt << 32) | (u64)compat_reg; 101 DBG(2,"restore_sigcontext32: upper_half & sar = %#lx\n", compat_regt); 102 DBG(2,"restore_sigcontext32: sar is %#lx\n", regs->sar); 238 compat_reg = (compat_uint_t)(regs->sar); 240 DBG(2,"setup_sigcontext32: sar is %#x\n", compat_reg); 242 compat_reg = (compat_uint_t)(regs->sar >> 32); 244 DBG(2,"setup_sigcontext32: upper half sar = %#x\n", compat_reg);
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