/linux-master/drivers/phy/qualcomm/ |
H A D | phy-qcom-eusb2-repeater.c | 98 static int eusb2_repeater_init_vregs(struct eusb2_repeater *rptr) argument 100 int num = rptr->cfg->num_vregs; 101 struct device *dev = rptr->dev; 104 rptr->vregs = devm_kcalloc(dev, num, sizeof(*rptr->vregs), GFP_KERNEL); 105 if (!rptr->vregs) 109 rptr->vregs[i].supply = rptr->cfg->vreg_list[i]; 111 return devm_regulator_bulk_get(dev, num, rptr->vregs); 116 struct eusb2_repeater *rptr local 161 struct eusb2_repeater *rptr = phy_get_drvdata(phy); local 194 struct eusb2_repeater *rptr = phy_get_drvdata(phy); local 208 struct eusb2_repeater *rptr; local 261 struct eusb2_repeater *rptr = platform_get_drvdata(pdev); local [all...] |
/linux-master/drivers/media/platform/amphion/ |
H A D | vpu_rpc.c | 40 ptr2 = desc->rptr; 42 ptr1 = desc->rptr; 112 msgword = *(u32 *)(shared->msg_mem_vir + desc->rptr - desc->start); 126 u32 rptr; local 133 data = (u32 *)(shared->msg_mem_vir + desc->rptr - desc->start); 134 rptr = desc->rptr; 137 rptr += 4; 138 if (rptr >= desc->end) { 139 rptr [all...] |
H A D | vpu_helpers.c | 237 u32 *rptr, u32 size, void *dst) 244 if (!stream_buffer || !rptr || !dst) 250 offset = *rptr; 265 *rptr = vpu_helper_step_walk(stream_buffer, offset, size); 347 if (desc.rptr > desc.wptr) 348 return desc.rptr - desc.wptr; 349 else if (desc.rptr < desc.wptr) 350 return (desc.end - desc.start + desc.rptr - desc.wptr); 362 if (desc.wptr > desc.rptr) 363 return desc.wptr - desc.rptr; 236 vpu_helper_copy_from_stream_buffer(struct vpu_buffer *stream_buffer, u32 *rptr, u32 size, void *dst) argument [all...] |
H A D | vpu_dbg.c | 284 "cmd_buf:[0x%x, 0x%x], wptr = 0x%x, rptr = 0x%x\n", 288 iface->cmd_desc->rptr); 292 "msg_buf:[0x%x, 0x%x], wptr = 0x%x, rptr = 0x%x\n", 296 iface->msg_desc->rptr); 308 u32 rptr; local 316 rptr = print_buf->read; 319 if (rptr == wptr) 321 else if (rptr < wptr) 322 length = wptr - rptr; 324 length = print_buf->bytes + wptr - rptr; [all...] |
/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_ih.c | 52 ih->rptr = 0; 61 /* add 8 bytes for the rptr/wptr shadows and 124 /* add 8 bytes for the rptr/wptr shadows and 162 if (wptr != READ_ONCE(ih->rptr)) { 167 wptr, ih->rptr); 196 ih->rptr == amdgpu_ih_get_wptr(adev, ih), timeout); 220 DRM_DEBUG("%s: rptr %d, wptr %d\n", __func__, ih->rptr, wptr); 225 while (ih->rptr != wptr && --count) { 227 ih->rptr 287 amdgpu_ih_decode_iv_ts_helper(struct amdgpu_ih_ring *ih, u32 rptr, signed int offset) argument [all...] |
H A D | amdgpu_ih.h | 69 unsigned rptr; member in struct:amdgpu_ih_ring 87 uint64_t (*decode_iv_ts)(struct amdgpu_ih_ring *ih, u32 rptr, 95 #define amdgpu_ih_decode_iv_ts(adev, ih, rptr, offset) \ 97 (adev)->irq.ih_funcs->decode_iv_ts((ih), (rptr), (offset))) 111 uint64_t amdgpu_ih_decode_iv_ts_helper(struct amdgpu_ih_ring *ih, u32 rptr,
|
H A D | tonga_ih.c | 41 * There is a rptr (read pointer) that determines where the 48 * equal again at which point it updates the rptr. 84 /* set rptr, wptr to 0 */ 88 adev->irq.ih.rptr = 0; 141 /* set rptr, wptr to 0 */ 216 wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); 217 ih->rptr = (wptr + 16) & ih->ptr_mask; 239 * Decodes the interrupt vector at the current rptr 246 /* wptr/rptr are in bytes! */ 247 u32 ring_index = ih->rptr >> [all...] |
H A D | si_ih.c | 59 adev->irq.ih.rptr = 0; 117 wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); 118 ih->rptr = (wptr + 16) & ih->ptr_mask; 136 u32 ring_index = ih->rptr >> 2; 150 ih->rptr += 16; 156 WREG32(IH_RB_RPTR, ih->rptr);
|
H A D | cik_ih.c | 41 * There is a rptr (read pointer) that determines where the 48 * equal again at which point it updates the rptr. 88 /* set rptr, wptr to 0 */ 92 adev->irq.ih.rptr = 0; 141 /* set rptr, wptr to 0 */ 202 wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); 203 ih->rptr = (wptr + 16) & ih->ptr_mask; 245 * Decodes the interrupt vector at the current rptr 252 /* wptr/rptr are in bytes! */ 253 u32 ring_index = ih->rptr >> [all...] |
H A D | iceland_ih.c | 41 * There is a rptr (read pointer) that determines where the 48 * equal again at which point it updates the rptr. 88 /* set rptr, wptr to 0 */ 92 adev->irq.ih.rptr = 0; 143 /* set rptr, wptr to 0 */ 212 wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); 213 ih->rptr = (wptr + 16) & ih->ptr_mask; 235 * Decodes the interrupt vector at the current rptr 242 /* wptr/rptr are in bytes! */ 243 u32 ring_index = ih->rptr >> [all...] |
H A D | cz_ih.c | 41 * There is a rptr (read pointer) that determines where the 48 * equal again at which point it updates the rptr. 88 /* set rptr, wptr to 0 */ 92 adev->irq.ih.rptr = 0; 143 /* set rptr, wptr to 0 */ 213 wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); 214 ih->rptr = (wptr + 16) & ih->ptr_mask; 236 * Decodes the interrupt vector at the current rptr 243 /* wptr/rptr are in bytes! */ 244 u32 ring_index = ih->rptr >> [all...] |
/linux-master/drivers/gpu/drm/radeon/ |
H A D | radeon_ring.c | 40 * There is a rptr (read pointer) that determines where the 83 uint32_t rptr = radeon_ring_get_rptr(rdev, ring); local 86 ring->ring_free_dw = rptr + (ring->ring_size / 4); 237 * Update the last rptr value and timestamp (all asics). 254 uint32_t rptr = radeon_ring_get_rptr(rdev, ring); local 258 if (rptr != atomic_read(&ring->last_rptr)) { 309 /* no way to read back the next rptr */ 375 * @rptr_offs: offset of the rptr writeback location in the WB buffer 470 uint32_t rptr, wptr, rptr_next; local 480 rptr [all...] |
/linux-master/drivers/video/fbdev/ |
H A D | maxinefb.c | 77 unsigned char *rptr; local 80 rptr = regs + 0x80000 + (regno << 4); 81 j = *((volatile unsigned short *) rptr);
|
/linux-master/include/linux/ |
H A D | ppp-comp.h | 50 int (*compress) (void *state, unsigned char *rptr,
|
/linux-master/sound/pci/riptide/ |
H A D | riptide.c | 797 union cmdret rptr = CMDRET_ZERO; local 801 SEND_RMEM(cif, 0x02, addr, &rptr); 802 rptr.retlongs[0] &= (~mask); 806 SEND_WMEM(cif, 0x02, (rptr.retlongs[0] | data)); 807 SEND_RMEM(cif, 0x02, addr, &rptr); 808 if ((rptr.retlongs[0] & data) == data) { 812 rptr.retlongs[0] &= ~mask; 923 union cmdret rptr = CMDRET_ZERO; local 929 SEND_RDGV(cif, num, num, &rptr); 930 if (rptr 957 union cmdret rptr = CMDRET_ZERO; local 974 union cmdret rptr = CMDRET_ZERO; local 1026 union cmdret rptr = CMDRET_ZERO; local 1059 union cmdret rptr = CMDRET_ZERO; local 1238 union cmdret rptr = CMDRET_ZERO; local 1348 union cmdret rptr = CMDRET_ZERO; local 1381 union cmdret rptr = CMDRET_ZERO; local 1726 union cmdret rptr = CMDRET_ZERO; local 1746 union cmdret rptr = CMDRET_ZERO; local [all...] |
/linux-master/drivers/net/ethernet/cavium/liquidio/ |
H A D | octeon_iq.h | 195 u64 rptr; member in struct:octeon_instr_32B 226 u64 rptr; member in struct:octeon_instr2_64B 253 u64 rptr; member in struct:octeon_instr3_64B
|
/linux-master/drivers/crypto/ccp/ |
H A D | tee-dev.c | 220 u32 rptr; local 232 rptr = ioread32(tee->io_regs + tee->vdata->ring_rptr_reg); 237 if (!(tee->rb_mgr.wptr + sizeof(struct tee_ring_cmd) == rptr || 241 dev_dbg(tee->dev, "tee: ring buffer full. rptr = %u wptr = %u\n", 242 rptr, tee->rb_mgr.wptr); 252 (tee->rb_mgr.wptr + sizeof(struct tee_ring_cmd) == rptr || 254 dev_err(tee->dev, "tee: ring buffer full. rptr = %u wptr = %u response flag %u\n", 255 rptr, tee->rb_mgr.wptr, cmd->flag);
|
/linux-master/drivers/gpu/drm/amd/display/dmub/src/ |
H A D | dmub_srv.c | 722 uint32_t rptr = dmub->hw_funcs.get_inbox1_rptr(dmub); local 725 if (rptr > dmub->inbox1_rb.capacity || wptr > dmub->inbox1_rb.capacity) { 728 dmub->inbox1_rb.rptr = rptr; 748 dmub->inbox1_rb.rptr = 0; 750 dmub->outbox0_rb.rptr = 0; 752 dmub->outbox1_rb.rptr = 0; 768 if (dmub->inbox1_rb.rptr > dmub->inbox1_rb.capacity || 795 flush_rb.rptr = dmub->inbox1_last_wptr; 861 uint32_t i, rptr; local [all...] |
/linux-master/drivers/gpu/drm/amd/display/dmub/inc/ |
H A D | dmub_cmd.h | 4577 uint32_t rptr; /**< Read pointer for consumer in bytes */ member in struct:dmub_rb 4594 return (rb->wrpt == rb->rptr); 4608 if (rb->wrpt >= rb->rptr) 4609 data_count = rb->wrpt - rb->rptr; 4611 data_count = rb->capacity - (rb->rptr - rb->wrpt); 4684 uint8_t *rb_cmd = (uint8_t *)(rb->base_address) + rb->rptr; 4705 *next_rptr = rb->rptr + DMUB_RB_CMD_SIZE * num_cmds; 4716 * @param rptr The ringbuffer offset 4722 uint32_t rptr) 4724 uint8_t *rb_cmd = (uint8_t *)(rb->base_address) + rptr; 4720 dmub_rb_peek_offset(struct dmub_rb *rb, union dmub_rb_cmd **cmd, uint32_t rptr) argument 4789 uint32_t rptr = rb->rptr; local [all...] |
/linux-master/drivers/gpu/drm/msm/ |
H A D | msm_ringbuffer.h | 31 volatile uint32_t rptr; member in struct:msm_rbmemptrs
|
/linux-master/drivers/net/ppp/ |
H A D | ppp_deflate.c | 46 static int z_compress(void *state, unsigned char *rptr, 177 * @rptr: uncompressed packet (input) 185 static int z_compress(void *arg, unsigned char *rptr, unsigned char *obuf, argument 195 proto = PPP_PROTOCOL(rptr); 209 wptr[0] = PPP_ADDRESS(rptr); 210 wptr[1] = PPP_CONTROL(rptr); 221 rptr += off; 222 state->strm.next_in = rptr;
|
/linux-master/drivers/gpu/drm/amd/amdkfd/ |
H A D | kfd_kernel_queue.c | 233 uint32_t wptr, rptr; local 237 /* When rptr == wptr, the buffer is empty. 238 * When rptr == wptr + 1, the buffer is full. 239 * It is always rptr that advances to the position of wptr, rather than 242 rptr = *kq->rptr_kernel; 248 pr_debug("rptr: %d\n", rptr); 252 available_size = (rptr + queue_size_dwords - 1 - wptr) % 267 if (packet_size_in_dwords >= rptr)
|
/linux-master/drivers/i2c/busses/ |
H A D | i2c-cpm.c | 305 int rptr; local 317 rptr = 0; 329 dev_dbg(&adap->dev, "R: %d T: %d\n", rptr, tptr); 331 cpm_i2c_parse_message(adap, pmsg, num, tptr, rptr); 333 rptr++; 346 rptr = 0; 355 !(in_be16(&rbdf[rptr].cbd_sc) & BD_SC_EMPTY), 368 ret = cpm_i2c_check_message(adap, pmsg, tptr, rptr); 371 rptr++;
|
/linux-master/drivers/gpu/drm/qxl/ |
H A D | qxl_object.c | 209 void *rptr; local 225 rptr = bo->kptr + (page_offset * PAGE_SIZE); 226 return rptr; 232 rptr = bo_map.vaddr; /* TODO: Use mapping abstraction properly */ 234 rptr += page_offset * PAGE_SIZE; 235 return rptr;
|
/linux-master/drivers/net/ethernet/tehuti/ |
H A D | tehuti.c | 170 f->rptr = 0; 1210 size = f->m.wptr - f->m.rptr; 1216 rxdd = (struct rxd_desc *)(f->m.va + f->m.rptr); 1231 f->m.rptr += tmp_len; 1233 tmp_len = f->m.rptr - f->m.memsz; 1235 f->m.rptr = tmp_len; 1237 DBG("wrapped desc rptr=%d tmp_len=%d\n", 1238 f->m.rptr, tmp_len); 1291 WRITE_REG(priv, f->m.reg_RPTR, f->m.rptr & TXF_WPTR_WR_PTR); 1370 BDX_ASSERT(*pptr != db->rptr [all...] |