Searched refs:rf3wireOffset (Results 1 - 4 of 4) sorted by relevance

/linux-master/drivers/staging/rtl8723bs/include/
H A Dhal_com_phycfg.h42 u32 rf3wireOffset; /* LSSI data: */ member in struct:bb_register_def
/linux-master/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_phy.c70 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
77 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
96 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, bMaskDWord,
118 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
125 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
135 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
142 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
313 priv->phy_reg_def[RF90_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter;
314 priv->phy_reg_def[RF90_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter;
H A Dr8190P_def.h105 u32 rf3wireOffset; member in struct:bb_reg_definition
/linux-master/drivers/staging/rtl8723bs/hal/
H A Drtl8723b_phycfg.c211 PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
322 pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */
323 pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter;

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