Searched refs:registers (Results 1 - 25 of 45) sorted by relevance

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/haiku/src/add-ons/kernel/drivers/graphics/radeon_hd/
H A Dradeon_hd.cpp328 uint32 bus_cntl = read32(info.registers + R600_BUS_CNTL);
329 uint32 d1vga_control = read32(info.registers + AVIVO_D1VGA_CONTROL);
330 uint32 d2vga_control = read32(info.registers + AVIVO_D2VGA_CONTROL);
332 = read32(info.registers + AVIVO_VGA_RENDER_CONTROL);
333 uint32 rom_cntl = read32(info.registers + R600_ROM_CNTL);
336 write32(info.registers + R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS));
338 write32(info.registers + AVIVO_D1VGA_CONTROL, (d1vga_control
341 write32(info.registers + AVIVO_D2VGA_CONTROL, (d2vga_control
344 write32(info.registers + AVIVO_VGA_RENDER_CONTROL,
347 write32(info.registers
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H A Dsensors.cpp30 rawTemp = (read32(info.registers + SI_CG_MULT_THERMAL_STATUS)
40 uint32 offset = (read32(info.registers + EVERGREEN_CG_THERMAL_CTRL)
42 rawTemp = (read32(info.registers + EVERGREEN_CG_TS0_STATUS)
53 uint32 rawTemp = read32(info.registers + EVERGREEN_CG_THERMAL_STATUS)
59 rawTemp = (read32(info.registers + EVERGREEN_CG_MULT_THERMAL_STATUS)
74 rawTemp = (read32(info.registers + R700_CG_MULT_THERMAL_STATUS)
88 rawTemp = (read32(info.registers + R600_CG_THERMAL_STATUS)
H A Dradeon_hd_private.h36 addr_t registers; member in struct:radeon_info
H A Ddevice.cpp84 uint32 oldValue = read32(info.registers + reg);
89 write32(info.registers + reg, value);
91 value = read32(info.registers + reg);
/haiku/src/add-ons/kernel/busses/i2c/pch/
H A Dpch_i2c.cpp30 write32(bus->registers + PCH_IC_ENABLE, status);
31 if ((read32(bus->registers + PCH_IC_ENABLE_STATUS) & 1) == status)
46 uint32 enable = read32(bus->registers + PCH_IC_ENABLE);
50 uint32 status = read32(bus->registers + PCH_IC_INTR_STAT);
52 write32(bus->registers + PCH_IC_CLR_RX_UNDER, 0);
54 write32(bus->registers + PCH_IC_CLR_RX_OVER, 0);
56 write32(bus->registers + PCH_IC_CLR_TX_OVER, 0);
58 write32(bus->registers + PCH_IC_CLR_RD_REQ, 0);
60 write32(bus->registers + PCH_IC_CLR_TX_ABRT, 0);
62 write32(bus->registers
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H A Dpch_i2c.h83 addr_t registers; member in struct:__anon7
/haiku/src/add-ons/kernel/drivers/graphics/intel_extreme/
H A Ddriver.h46 return *(volatile uint16*)(info.registers
55 return *(volatile uint32*)(info.registers
64 *(volatile uint16*)(info.registers
73 *(volatile uint32*)(info.registers
H A Dintel_extreme_private.h28 addr_t registers; member in struct:intel_info
51 panic("find_reg is only supposed to be used for unrouped registers\n");
H A Dintel_extreme.cpp47 overlay_registers registers; local
48 memset(&registers, 0, sizeof(registers));
49 registers.contrast_correction = 0x48;
50 registers.saturation_cos_correction = 0x9a;
53 user_memcpy(_registers, &registers, sizeof(overlay_registers));
305 // These registers do not exist on later GPUs.
643 // TODO: registers are mapped twice (by us and intel_gart), maybe we
656 (void**)&info.registers);
822 // setup overlay registers
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/haiku/src/add-ons/accelerants/intel_extreme/
H A Doverlay.cpp195 overlay_registers* registers = gInfo->overlay_registers; local
197 registers->color_key_red = red;
198 registers->color_key_green = green;
199 registers->color_key_blue = blue;
200 registers->color_key_mask_red = ~redMask;
201 registers->color_key_mask_green = ~greenMask;
202 registers->color_key_mask_blue = ~blueMask;
203 registers->color_key_enabled = true;
287 overlay_registers* registers = gInfo->overlay_registers;
290 registers
555 overlay_registers* registers = gInfo->overlay_registers; local
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H A Daccelerant.h39 uint8* registers; member in struct:accelerant_info
87 return *(volatile uint32*)(gInfo->registers
95 *(volatile uint32*)(gInfo->registers
H A Dengine.cpp101 uint32 registers; local
102 // G33 does not need a physical address for the overlay registers
104 registers = gInfo->shared_info->physical_overlay_registers;
106 registers = gInfo->shared_info->overlay_offset;
108 Write(registers | (updateCoefficients ? OVERLAY_UPDATE_COEFFICIENTS : 0));
/haiku/src/system/kernel/arch/x86/
H A Dioapic.cpp105 ioapic_registers* registers; member in struct:ioapic
152 ioapic.registers->io_register_select = registerSelect;
153 return ioapic.registers->io_window_register;
160 ioapic.registers->io_register_select = registerSelect;
161 ioapic.registers->io_window_register = value;
168 ioapic.registers->io_register_select = registerSelect + 1;
169 uint64 result = ioapic.registers->io_window_register;
171 ioapic.registers->io_register_select = registerSelect;
172 result |= ioapic.registers->io_window_register;
181 ioapic.registers
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H A Darch_debug.cpp328 // Since x86_64 uses registers rather than the stack for the first 6
496 arch_debug_registers* registers = debug_get_debug_registers(
498 if (registers == NULL)
500 *_bp = registers->bp;
1047 arch_debug_save_registers(arch_debug_registers* registers) argument
1051 registers->bp = (addr_t)frame->previous;
1076 arch_debug_registers* registers = debug_get_debug_registers(
1078 if (registers == NULL)
1080 bp = registers->bp;
1266 /*! Writes the contents of the CPU registers a
1294 gdb_register registers[kRegisterCount] = { local
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/haiku/src/add-ons/kernel/busses/random/ccp/
H A Dccp.cpp33 uint32 lowValue = read32(bus->registers + CCP_REG_TRNG);
34 uint32 highValue = read32(bus->registers + CCP_REG_TRNG);
82 bus->registersArea = map_physical_memory("CCP memory mapped registers",
85 (void **)&bus->registers);
H A Dccp.h52 addr_t registers; member in struct:__anon9
/haiku/src/system/kernel/arch/sparc/
H A Darch_debug.cpp28 arch_debug_save_registers(struct arch_debug_registers* registers) argument
/haiku/headers/private/kernel/arch/
H A Ddebug.h45 void arch_debug_save_registers(struct arch_debug_registers* registers);
/haiku/src/add-ons/kernel/drivers/power/pch_thermal/
H A Dpch_thermal.cpp65 addr_t registers; member in struct:pch_thermal_device_info
152 uint16 temp = read16(device->registers + PCH_THERMAL_TEMP);
291 // map the registers (low + high for 64-bit when requested)
303 B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA, (void**)&device->registers);
313 uint8 tsel = read8(device->registers + PCH_THERMAL_TSEL);
322 write8(device->registers + PCH_THERMAL_TSEL,
332 uint16 ctt = read16(device->registers + PCH_THERMAL_CTT);
336 uint16 phl = read16(device->registers + PCH_THERMAL_PHL);
/haiku/src/kits/debugger/value/
H A DValueWriter.cpp65 const Register* registers = fArchitecture->Registers(); local
97 const Register* target = registers + piece.reg;
H A DValueLoader.cpp99 const Register* registers = fArchitecture->Registers(); local
175 if (!fCpuState->GetRegisterValue(registers + piece.reg,
/haiku/src/kits/debugger/arch/
H A DArchitecture.cpp60 // registers. We set them respectively.
63 const Register* registers = Registers(); local
78 switch (registers[i].Type()) {
/haiku/src/add-ons/kernel/busses/mmc/
H A Dsdhci.h21 // Ricoh specific PCI registers
23 // to standard sdhci using these PCI registers
33 SdhciBus(struct registers* registers, uint8_t irq, bool poll);
55 struct registers* fRegisters;
222 // #pragma mark Interrupt registers
319 struct registers { struct
/haiku/src/system/kernel/arch/ppc/
H A Darch_debug.cpp260 arch_debug_save_registers(struct arch_debug_registers* registers) argument
264 registers->r1 = (addr_t)frame->previous;
/haiku/src/kits/debugger/debug_info/
H A DDwarfImageDebugInfo.cpp87 BasicTargetInterface(const Register* registers, int32 registerCount, argument
91 fRegisters(registers),
178 UnwindTargetInterface(const Register* registers, int32 registerCount, argument
182 BasicTargetInterface(registers, registerCount, fromDwarfMap,
494 const Register* registers = fArchitecture->Registers(); local
509 = new(std::nothrow) BasicTargetInterface(registers, registerCount,
607 const Register* registers = fArchitecture->Registers(); local
628 = new(std::nothrow) UnwindTargetInterface(registers, registerCount,
637 = new(std::nothrow) UnwindTargetInterface(registers, registerCount,
662 TRACE_CFI("unwound registers
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