/linux-master/drivers/media/spi/ |
H A D | gs1662.c | 54 u16 reg_value; member in struct:gs_reg_fmt 59 u16 reg_value; member in struct:gs_reg_fmt_custom 235 if (reg_fmt[i].reg_value == std) { 251 return reg_fmt[i].reg_value | MASK_FORCE_STD; 266 int reg_value; local 268 reg_value = get_register_timings(timings); 269 if (reg_value == 0x0) 290 u16 reg_value, i; local 301 gs_read_register(gs->pdev, REG_LINES_PER_FRAME + i, ®_value); 302 if (reg_value) 341 int reg_value; local 361 u16 reg_value, i; local [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/ |
H A D | dm_services.h | 89 uint32_t reg_value, 93 return (mask & reg_value) >> shift; 96 #define get_reg_field_value(reg_value, reg_name, reg_field)\ 98 (reg_value),\ 103 uint32_t reg_value, 109 return (reg_value & ~mask) | (mask & (value << shift)); 112 #define set_reg_field_value(reg_value, value, reg_name, reg_field)\ 113 (reg_value) = set_reg_field_value_ex(\ 114 (reg_value),\ 165 #define get_reg_field_value_soc15(reg_value, bloc 88 get_reg_field_value_ex( uint32_t reg_value, uint32_t mask, uint8_t shift) argument 102 set_reg_field_value_ex( uint32_t reg_value, uint32_t value, uint32_t mask, uint8_t shift) argument [all...] |
/linux-master/drivers/platform/x86/intel/int1092/ |
H A D | intel_sar.h | 69 * @reg_value: regulatory value 80 int reg_value; member in struct:wwan_sar_context
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/linux-master/drivers/media/dvb-frontends/cxd2880/ |
H A D | cxd2880_io.c | 49 const struct cxd2880_reg_value reg_value[], 59 ret = io->write_reg(io, tgt, reg_value[i].addr, 60 reg_value[i].value); 47 cxd2880_io_write_multi_regs(struct cxd2880_io *io, enum cxd2880_io_tgt tgt, const struct cxd2880_reg_value reg_value[], u8 size) argument
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H A D | cxd2880_tnrdmd_dvbt_mon.c | 392 u16 *reg_value) 397 if (!tnr_dmd || !reg_value) 428 *reg_value = (rdata[0] << 8) | rdata[1]; 434 u32 reg_value, int *snr) 439 if (reg_value == 0) 442 if (reg_value > 4996) 443 reg_value = 4996; 445 *snr = intlog10(reg_value) - intlog10(5350 - reg_value); 454 u16 reg_value local 391 dvbt_read_snr_reg(struct cxd2880_tnrdmd *tnr_dmd, u16 *reg_value) argument 433 dvbt_calc_snr(struct cxd2880_tnrdmd *tnr_dmd, u32 reg_value, int *snr) argument 493 u16 reg_value = 0; local [all...] |
H A D | cxd2880_io.h | 52 const struct cxd2880_reg_value reg_value[],
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/linux-master/drivers/clk/ |
H A D | clk-max9485.c | 36 u8 reg_value; member in struct:max9485_rate 80 u8 reg_value; member in struct:max9485_driver_data 96 drvdata->reg_value &= ~mask; 97 drvdata->reg_value |= value; 101 mask, value, drvdata->reg_value); 104 &drvdata->reg_value, 105 sizeof(drvdata->reg_value)); 144 entry->reg_value); 152 u8 val = drvdata->reg_value & MAX9485_FREQ_MASK; 156 if (val == entry->reg_value) [all...] |
/linux-master/drivers/staging/vt6655/ |
H A D | mac.c | 42 unsigned char reg_value; local 44 reg_value = ioread8(iobase + reg_offset); 45 iowrite8(reg_value | bit_mask, iobase + reg_offset); 50 unsigned short reg_value; local 52 reg_value = ioread16(iobase + reg_offset); 53 iowrite16(reg_value | (bit_mask), iobase + reg_offset); 58 unsigned char reg_value; local 60 reg_value = ioread8(iobase + reg_offset); 61 iowrite8(reg_value & ~(bit_mask), iobase + reg_offset); 66 unsigned short reg_value; local 74 u8 reg_value; local [all...] |
/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | mmsch_v3_0.h | 68 uint32_t reg_value; member in struct:mmsch_v3_0_cmd_direct_write 89 uint32_t reg_value; member in struct:mmsch_v3_0_cmd_indirect_write 107 direct_wt.reg_value = value; \
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H A D | sdma_v4_4.c | 201 uint32_t reg_value = 0; local 205 reg_value = RREG32(reg_offset); 207 if (reg_value) 208 sdma_v4_4_get_ras_error_count(adev, regSDMA0_EDC_COUNTER, reg_value, 212 reg_value = RREG32(reg_offset); 214 if (reg_value) 215 sdma_v4_4_get_ras_error_count(adev, regSDMA0_EDC_COUNTER2, reg_value,
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H A D | mmsch_v1_0.h | 73 uint32_t reg_value; member in struct:mmsch_v1_0_cmd_direct_write 94 uint32_t reg_value; member in struct:mmsch_v1_0_cmd_indirect_write 103 direct_wt->reg_value = value;
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H A D | mmsch_v4_0.h | 80 uint32_t reg_value; member in struct:mmsch_v4_0_cmd_direct_write 101 uint32_t reg_value; member in struct:mmsch_v4_0_cmd_indirect_write 119 direct_wt.reg_value = value; \
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H A D | umc_v6_7.c | 64 uint64_t reg_value; local 75 reg_value = RREG64_PCIE((mc_umc_addr + umc_reg_offset) * 4); 76 if (reg_value) 77 dev_info(adev->dev, "MCA IPID 0x%llx, umc_reg_offset 0x%x\n", reg_value, umc_reg_offset); 82 reg_value = RREG64_PCIE((mc_umc_addr + umc_reg_offset) * 4); 83 if (reg_value) 84 dev_info(adev->dev, "MCA SYND 0x%llx, umc_reg_offset 0x%x\n", reg_value, umc_reg_offset); 89 reg_value = RREG64_PCIE((mc_umc_addr + umc_reg_offset) * 4); 90 if (reg_value) 91 dev_info(adev->dev, "MCA MISC0 0x%llx, umc_reg_offset 0x%x\n", reg_value, umc_reg_offse [all...] |
/linux-master/sound/pci/echoaudio/ |
H A D | echoaudio_gml.c | 66 __le32 reg_value; local 77 reg_value = cpu_to_le32(value); 78 if (reg_value != chip->comm_page->control_register || force) { 81 chip->comm_page->control_register = reg_value;
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/linux-master/sound/soc/mediatek/mt8188/ |
H A D | mt8188-dai-pcm.c | 34 unsigned int reg_value; member in struct:mtk_dai_pcm_rate 45 { .rate = 8000, .reg_value = 0, }, 46 { .rate = 16000, .reg_value = 1, }, 47 { .rate = 32000, .reg_value = 2, }, 48 { .rate = 48000, .reg_value = 3, }, 49 { .rate = 11025, .reg_value = 1, }, 50 { .rate = 22050, .reg_value = 2, }, 51 { .rate = 44100, .reg_value = 3, }, 60 return mtk_dai_pcm_rates[i].reg_value;
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/linux-master/sound/soc/mediatek/mt8195/ |
H A D | mt8195-dai-pcm.c | 32 unsigned int reg_value; member in struct:mtk_dai_pcm_rate 43 { .rate = 8000, .reg_value = 0, }, 44 { .rate = 16000, .reg_value = 1, }, 45 { .rate = 32000, .reg_value = 2, }, 46 { .rate = 48000, .reg_value = 3, }, 47 { .rate = 11025, .reg_value = 1, }, 48 { .rate = 22050, .reg_value = 2, }, 49 { .rate = 44100, .reg_value = 3, }, 58 return mtk_dai_pcm_rates[i].reg_value;
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/linux-master/drivers/mmc/host/ |
H A D | dw_mmc-starfive.c | 45 u32 reg_value = mci_readl(host, UHS_REG_EXT); local 48 reg_value &= ~STARFIVE_SMPL_PHASE; 49 reg_value |= FIELD_PREP(STARFIVE_SMPL_PHASE, smpl_phase); 50 mci_writel(host, UHS_REG_EXT, reg_value);
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/linux-master/drivers/phy/allwinner/ |
H A D | phy-sun9i-usb.c | 46 u32 bits, reg_value; local 56 reg_value = readl(phy->pmu); 59 reg_value |= bits; 61 reg_value &= ~bits; 63 writel(reg_value, phy->pmu);
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/linux-master/arch/powerpc/platforms/pseries/ |
H A D | rtas-fadump.h | 100 __be64 reg_value; member in struct:rtas_fadump_reg_entry
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/linux-master/drivers/media/dvb-frontends/ |
H A D | stv6111.c | 32 u16 reg_value; member in struct:slookup 533 int table_size, u16 reg_value) 542 if (reg_value <= table[0].reg_value) { 544 } else if (reg_value >= table[imax].reg_value) { 549 if ((table[imin].reg_value <= reg_value) && 550 (reg_value <= table[i].reg_value)) 532 table_lookup(const struct slookup *table, int table_size, u16 reg_value) argument [all...] |
/linux-master/arch/powerpc/platforms/cell/ |
H A D | cbe_thermal.c | 56 static inline u8 reg_to_temp(u8 reg_value) argument 58 return ((reg_value & 0x3f) << 1) + TEMP_MIN; 114 u64 reg_value; local 126 reg_value = in_be64(&pmd_regs->tm_tpr.val); 129 reg_value &= ~(0xffull << pos); 131 reg_value |= new_value << pos; 133 out_be64(&pmd_regs->tm_tpr.val, reg_value);
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/linux-master/drivers/power/supply/ |
H A D | ab8500_fg.c | 1844 u8 reg_value; local 1855 ®_value); 1860 if ((reg_value & BATT_OVV) == BATT_OVV) { 2582 u8 reg_value; local 2587 AB8505_RTC_PCUT_FLAG_TIME_REG, ®_value); 2594 return sysfs_emit(buf, "%d\n", (reg_value & 0x7F)); 2605 int reg_value; local 2609 if (kstrtoint(buf, 10, ®_value)) 2612 if (reg_value > 0x7F) { 2618 AB8505_RTC_PCUT_FLAG_TIME_REG, (u8)reg_value); 2632 u8 reg_value; local 2656 int reg_value; local 2683 u8 reg_value; local 2706 int reg_value; local 2734 u8 reg_value; local 2757 u8 reg_value; local 2780 u8 reg_value; local 2801 int reg_value; local 2829 u8 reg_value; local 2852 u8 reg_value; local 2875 int reg_value; local 2902 u8 reg_value; local [all...] |
/linux-master/drivers/ata/ |
H A D | ahci_imx.c | 824 struct reg_value { struct 826 u32 reg_value; member in struct:reg_value 831 const struct reg_value *values; 837 static const struct reg_value gpr13_tx_level[] = { 872 static const struct reg_value gpr13_tx_boost[] = { 891 static const struct reg_value gpr13_tx_atten[] = { 900 static const struct reg_value gpr13_rx_eq[] = { 943 u32 reg_value = 0; local 951 reg_value |= prop->set_value; 953 reg_value | 1087 u32 reg_value; local [all...] |
/linux-master/drivers/hwtracing/coresight/ |
H A D | coresight-cti-core.c | 344 u32 reg_value; local 375 reg_value = direction == CTI_TRIG_IN ? config->ctiinen[trigger_idx] : 378 reg_value |= chan_bitmask; 380 reg_value &= ~chan_bitmask; 384 config->ctiinen[trigger_idx] = reg_value; 386 config->ctiouten[trigger_idx] = reg_value; 390 cti_write_single_reg(drvdata, reg_offset, reg_value); 401 u32 reg_value; local 410 reg_value = config->ctigate; 413 reg_value | 439 u32 reg_value; local [all...] |
/linux-master/drivers/gpu/drm/amd/display/dmub/src/ |
H A D | dmub_reg.c | 66 static inline uint32_t get_reg_field_value_ex(uint32_t reg_value, uint32_t mask, argument 69 return (mask & reg_value) >> shift;
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