Searched refs:reg_type (Results 1 - 25 of 65) sorted by relevance

123

/linux-master/arch/powerpc/platforms/powernv/
H A Dopal-fadump.h81 __be32 reg_type; member in struct:hdat_fadump_reg_entry
87 u32 reg_type, u32 reg_num,
90 if (reg_type == HDAT_FADUMP_REG_TYPE_GPR) {
140 be32_to_cpu(reg_entry->reg_type),
86 opal_fadump_set_regval_regnum(struct pt_regs *regs, u32 reg_type, u32 reg_num, u64 reg_val) argument
/linux-master/drivers/comedi/drivers/
H A Dni_pcimio.c461 .reg_type = ni_reg_611x,
476 .reg_type = ni_reg_611x,
527 .reg_type = ni_reg_6711,
537 .reg_type = ni_reg_6711,
547 .reg_type = ni_reg_6713,
557 .reg_type = ni_reg_6713,
567 .reg_type = ni_reg_6711,
577 .reg_type = ni_reg_6711,
588 .reg_type = ni_reg_6713,
598 .reg_type
[all...]
/linux-master/drivers/gpu/drm/exynos/
H A Dexynos_drm_g2d.c186 * @handles: stores buffer handle in its reg_type position
187 * @types: stores buffer type in its reg_type position
188 * @descs: stores buffer description in its reg_type position
562 enum g2d_reg_type reg_type; local
570 reg_type = REG_TYPE_SRC;
573 reg_type = REG_TYPE_SRC_PLANE2;
580 reg_type = REG_TYPE_DST;
583 reg_type = REG_TYPE_DST_PLANE2;
586 reg_type = REG_TYPE_PAT;
589 reg_type
628 g2d_check_buf_desc_is_valid(struct g2d_data *g2d, struct g2d_buf_desc *buf_desc, enum g2d_reg_type reg_type, unsigned long size) argument
694 enum g2d_reg_type reg_type; local
777 enum g2d_reg_type reg_type; local
1035 enum g2d_reg_type reg_type; local
[all...]
/linux-master/drivers/memory/
H A Dstm32-fmc2-ebi.c214 * @reg_type: the register that have to be modified
230 int reg_type; member in struct:stm32_fmc2_prop
364 if (prop->reg_type == FMC2_REG_BWTR)
469 static int stm32_fmc2_ebi_get_reg(int reg_type, int cs, u32 *reg) argument
471 switch (reg_type) {
501 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, &reg);
720 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, &reg);
728 if (prop->reg_type == FMC2_REG_BWTR)
752 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, &reg);
770 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, c
[all...]
/linux-master/drivers/gpio/
H A Dgpio-ftgpio010.c91 u32 reg_both, reg_level, reg_type; local
93 reg_type = readl(g->base + GPIO_INT_TYPE);
100 reg_type &= ~mask;
105 reg_type &= ~mask;
111 reg_type &= ~mask;
117 reg_type |= mask;
122 reg_type |= mask;
130 writel(reg_type, g->base + GPIO_INT_TYPE);
H A Dgpio-crystalcove.c82 static inline int to_reg(int gpio, enum ctrl_register reg_type) argument
99 if (reg_type == CTRL_IN) {
/linux-master/drivers/cxl/core/
H A Dregs.c274 u8 reg_type = FIELD_GET(CXL_DVSEC_REG_LOCATOR_BLOCK_ID_MASK, reg_lo); local
282 &pdev->resource[bar], &offset, reg_type);
286 map->reg_type = reg_type;
337 if (map->reg_type == type) {
431 switch (map->reg_type) {
/linux-master/include/uapi/rdma/
H A Dirdma-abi.h80 __u16 reg_type; /* enum irdma_memreg_type */ member in struct:irdma_mem_reg_req
/linux-master/arch/powerpc/platforms/ps3/
H A Dplatform.h115 enum ps3_reg_type *reg_type);
121 enum ps3_reg_type *reg_type, u64 *bus_addr, u64 *len);
144 enum ps3_reg_type reg_type, u64 *bus_addr, u64 *len);
H A Drepository.c251 enum ps3_reg_type *reg_type)
262 *reg_type = v1;
279 enum ps3_reg_type *reg_type, u64 *bus_addr, u64 *len)
282 reg_index, reg_type);
521 enum ps3_reg_type reg_type, u64 *bus_addr, u64 *len)
526 pr_devel("%s:%d: find reg_type %u\n", __func__, __LINE__, reg_type);
544 if (t == reg_type) {
554 pr_devel("%s:%d: found reg_type %u at res_index %u\n",
555 __func__, __LINE__, reg_type, res_inde
249 ps3_repository_read_dev_reg_type(unsigned int bus_index, unsigned int dev_index, unsigned int reg_index, enum ps3_reg_type *reg_type) argument
277 ps3_repository_read_dev_reg(unsigned int bus_index, unsigned int dev_index, unsigned int reg_index, enum ps3_reg_type *reg_type, u64 *bus_addr, u64 *len) argument
520 ps3_repository_find_reg(const struct ps3_repository_device *repo, enum ps3_reg_type reg_type, u64 *bus_addr, u64 *len) argument
1210 enum ps3_reg_type reg_type; local
[all...]
/linux-master/drivers/crypto/intel/qat/qat_common/
H A Dadf_common_drv.h165 enum icp_qat_uof_regtype reg_type,
169 enum icp_qat_uof_regtype reg_type,
173 enum icp_qat_uof_regtype reg_type,
H A Dqat_hal.c1116 enum icp_qat_uof_regtype reg_type,
1125 reg_addr = qat_hal_get_reg_addr(reg_type, reg_num);
1130 switch (reg_type) {
1177 enum icp_qat_uof_regtype reg_type,
1190 dest_addr = qat_hal_get_reg_addr(reg_type, reg_num);
1202 switch (reg_type) {
1331 enum icp_qat_uof_regtype reg_type,
1354 switch (reg_type) {
1372 enum icp_qat_uof_regtype reg_type,
1402 xfr_addr = qat_hal_get_reg_addr(reg_type, reg_nu
1114 qat_hal_rd_rel_reg(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int *data) argument
1175 qat_hal_wr_rel_reg(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int data) argument
1329 qat_hal_put_rel_rd_xfer(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int val) argument
1370 qat_hal_put_rel_wr_xfer(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int data) argument
1468 qat_hal_init_gpr(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned long ctx_mask, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int regdata) argument
1502 qat_hal_init_wr_xfer(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned long ctx_mask, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int regdata) argument
1537 qat_hal_init_rd_xfer(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned long ctx_mask, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int regdata) argument
[all...]
H A Dicp_qat_uclo.h297 char reg_type; member in struct:icp_qat_uof_init_regsym
329 unsigned char reg_type; member in struct:icp_qat_uof_sbreak
/linux-master/drivers/pinctrl/meson/
H A Dpinctrl-meson.c93 * @reg_type: the type of register needed (pull-enable, pull, etc...)
98 enum meson_reg_type reg_type,
101 struct meson_reg_desc *desc = &bank->regs[reg_type];
103 *bit = (desc->bit + pin - bank->first) * meson_bit_strides[reg_type];
181 unsigned int reg_type,
192 meson_calc_reg_and_bit(bank, pin, reg_type, &reg, &bit);
199 unsigned int reg_type)
209 meson_calc_reg_and_bit(bank, pin, reg_type, &reg, &bit);
97 meson_calc_reg_and_bit(struct meson_bank *bank, unsigned int pin, enum meson_reg_type reg_type, unsigned int *reg, unsigned int *bit) argument
179 meson_pinconf_set_gpio_bit(struct meson_pinctrl *pc, unsigned int pin, unsigned int reg_type, bool arg) argument
197 meson_pinconf_get_gpio_bit(struct meson_pinctrl *pc, unsigned int pin, unsigned int reg_type) argument
/linux-master/arch/powerpc/sysdev/
H A Dmpic.c214 enum mpic_reg_type type = mpic->reg_type;
228 _mpic_write(mpic->reg_type, &mpic->gregs, offset, value);
242 return _mpic_read(mpic->reg_type, &mpic->tmregs, offset);
250 _mpic_write(mpic->reg_type, &mpic->tmregs, offset, value);
257 return _mpic_read(mpic->reg_type, &mpic->cpuregs[cpu], reg);
264 _mpic_write(mpic->reg_type, &mpic->cpuregs[cpu], reg, value);
273 val = _mpic_read(mpic->reg_type, &mpic->isus[isu],
289 _mpic_write(mpic->reg_type, &mpic->isus[isu],
299 #define mpic_read(b,r) _mpic_read(mpic->reg_type,&(b),(r))
300 #define mpic_write(b,r,v) _mpic_write(mpic->reg_type,
[all...]
/linux-master/drivers/scsi/libsas/
H A Dsas_host_smp.c114 u8 reg_type, u8 reg_index, u8 reg_count,
125 written = i->dft->lldd_write_gpio(sas_ha, reg_type, reg_index,
113 sas_host_smp_write_gpio(struct sas_ha_struct *sas_ha, u8 *resp_data, u8 reg_type, u8 reg_index, u8 reg_count, u8 *req_data) argument
/linux-master/net/ipv4/
H A Dbpf_tcp_ca.c68 if (base_type(info->reg_type) == PTR_TO_BTF_ID &&
69 !bpf_type_has_unsafe_modifiers(info->reg_type) &&
/linux-master/drivers/tty/serial/8250/
H A D8250_bcm7271.c248 int reg_type, int offset)
250 return readl(priv->regs[reg_type] + offset);
254 int reg_type, int offset, u32 value)
256 writel(value, priv->regs[reg_type] + offset);
260 int reg_type, int offset, u32 bits)
262 void __iomem *reg = priv->regs[reg_type] + offset;
271 int reg_type, int offset, u32 bits)
273 void __iomem *reg = priv->regs[reg_type] + offset;
247 udma_readl(struct brcmuart_priv *priv, int reg_type, int offset) argument
253 udma_writel(struct brcmuart_priv *priv, int reg_type, int offset, u32 value) argument
259 udma_set(struct brcmuart_priv *priv, int reg_type, int offset, u32 bits) argument
270 udma_unset(struct brcmuart_priv *priv, int reg_type, int offset, u32 bits) argument
/linux-master/drivers/net/ethernet/ibm/ehea/
H A Dehea_main.c277 arr[i].reg_type = EHEA_BCMC_BROADCAST |
283 arr[i].reg_type = EHEA_BCMC_BROADCAST |
295 arr[i].reg_type = EHEA_BCMC_MULTICAST |
298 arr[i].reg_type |= EHEA_BCMC_SCOPE_ALL;
303 arr[i].reg_type = EHEA_BCMC_MULTICAST |
306 arr[i].reg_type |= EHEA_BCMC_SCOPE_ALL;
1687 u8 reg_type; local
1690 reg_type = EHEA_BCMC_BROADCAST | EHEA_BCMC_UNTAGGED;
1693 reg_type, port->mac_addr, 0, hcallid);
1702 reg_type
1820 u8 reg_type; local
[all...]
H A Dehea_phyp.c574 const u8 reg_type, const u64 mc_mac_addr,
581 r6_reg_type = EHEA_BMASK_SET(H_REGBCMC_REGTYPE, reg_type);
573 ehea_h_reg_dereg_bcmc(const u64 adapter_handle, const u16 port_num, const u8 reg_type, const u64 mc_mac_addr, const u16 vlan_id, const u32 hcall_id) argument
/linux-master/drivers/scsi/mvsas/
H A Dmv_sas.h157 int (*gpio_write)(struct mvs_prv_info *mvs_prv, u8 reg_type,
453 int mvs_gpio_write(struct sas_ha_struct *, u8 reg_type, u8 reg_index,
/linux-master/drivers/net/wireless/marvell/mwifiex/
H A Ddebugfs.c422 u32 reg_type = 0, reg_offset = 0, reg_value = UINT_MAX; local
428 if (sscanf(buf, "%u %x %x", &reg_type, &reg_offset, &reg_value) != 3) {
433 if (reg_type == 0 || reg_offset == 0) {
437 saved_reg_type = reg_type;
/linux-master/arch/powerpc/include/asm/
H A Dmpic.h300 enum mpic_reg_type reg_type; member in struct:mpic
/linux-master/drivers/net/ethernet/broadcom/asp2/
H A Dbcmasp.c189 enum asp_netfilt_reg_type reg_type,
222 switch (reg_type) {
236 enum asp_netfilt_reg_type reg_type,
245 reg_offset = bcmasp_netfilt_get_reg_offset(priv, nfilt, reg_type,
253 enum asp_netfilt_reg_type reg_type,
262 reg_offset = bcmasp_netfilt_get_reg_offset(priv, nfilt, reg_type,
187 bcmasp_netfilt_get_reg_offset(struct bcmasp_priv *priv, struct bcmasp_net_filter *nfilt, enum asp_netfilt_reg_type reg_type, u32 offset) argument
234 bcmasp_netfilt_wr(struct bcmasp_priv *priv, struct bcmasp_net_filter *nfilt, enum asp_netfilt_reg_type reg_type, u32 val, u32 offset) argument
251 bcmasp_netfilt_rd(struct bcmasp_priv *priv, struct bcmasp_net_filter *nfilt, enum asp_netfilt_reg_type reg_type, u32 offset) argument
/linux-master/drivers/net/wireless/realtek/rtlwifi/btcoexist/
H A Dhalbtcoutsrc.h720 void (*btc_set_bt_reg)(void *btc_context, u8 reg_type, u32 offset,
722 u32 (*btc_get_bt_reg)(void *btc_context, u8 reg_type, u32 offset);

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