Searched refs:regUVD_JRBC_IB_SIZE_BASE_IDX (Results 1 - 4 of 4) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_6_0_offset.h943 #define regUVD_JRBC_IB_SIZE_BASE_IDX 0 macro
H A Dvcn_4_0_0_offset.h863 #define regUVD_JRBC_IB_SIZE_BASE_IDX 1 macro
H A Dvcn_4_0_5_offset.h832 #define regUVD_JRBC_IB_SIZE_BASE_IDX 1 macro
H A Dvcn_5_0_0_offset.h747 #define regUVD_JRBC_IB_SIZE_BASE_IDX 1 macro

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