Searched refs:regSDMA1_RLC_CGCG_CTRL (Results 1 - 3 of 3) sorted by path

/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c4962 data = RREG32_SOC15(GC, 0, regSDMA1_RLC_CGCG_CTRL);
4964 WREG32_SOC15(GC, 0, regSDMA1_RLC_CGCG_CTRL, data);
4996 data = RREG32_SOC15(GC, 0, regSDMA1_RLC_CGCG_CTRL);
4998 WREG32_SOC15(GC, 0, regSDMA1_RLC_CGCG_CTRL, data);
/linux-master/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_offset.h1002 #define regSDMA1_RLC_CGCG_CTRL 0x065c macro
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H A Dgc_11_0_3_offset.h1008 #define regSDMA1_RLC_CGCG_CTRL 0x065c macro
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