Searched refs:regSDMA0_QUEUE3_DOORBELL_OFFSET (Results 1 - 3 of 3) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_offset.h486 #define regSDMA0_QUEUE3_DOORBELL_OFFSET 0x01b3 macro
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H A Dgc_11_0_3_offset.h492 #define regSDMA0_QUEUE3_DOORBELL_OFFSET 0x01b3 macro
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H A Dgc_11_5_0_offset.h491 #define regSDMA0_QUEUE3_DOORBELL_OFFSET 0x01b3 macro
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