Searched refs:regSDMA0_POWER_CNTL_BASE_IDX (Results 1 - 4 of 4) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_offset.h39 #define regSDMA0_POWER_CNTL_BASE_IDX 0 macro
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H A Dgc_11_0_3_offset.h39 #define regSDMA0_POWER_CNTL_BASE_IDX 0 macro
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H A Dgc_11_5_0_offset.h41 #define regSDMA0_POWER_CNTL_BASE_IDX 0 macro
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/linux-master/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_offset.h38 #define regSDMA0_POWER_CNTL_BASE_IDX 0 macro

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