Searched refs:regRLC_UTCL1_STATUS_BASE_IDX (Results 1 - 5 of 5) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_offset.h10045 #define regRLC_UTCL1_STATUS_BASE_IDX macro
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H A Dgc_11_0_3_offset.h10657 #define regRLC_UTCL1_STATUS_BASE_IDX macro
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H A Dgc_11_5_0_offset.h8720 #define regRLC_UTCL1_STATUS_BASE_IDX 1 macro
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H A Dgc_9_4_2_offset.h5199 #define regRLC_UTCL1_STATUS_BASE_IDX 1 macro
H A Dgc_9_4_3_offset.h6721 #define regRLC_UTCL1_STATUS_BASE_IDX 1 macro

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