Searched refs:regRLC_PACE_UCODE_ADDR (Results 1 - 4 of 4) sorted by path

/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c1935 WREG32_SOC15(GC, 0, regRLC_PACE_UCODE_ADDR, 0);
1944 WREG32_SOC15(GC, 0, regRLC_PACE_UCODE_ADDR, adev->gfx.rlc_fw_version);
/linux-master/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_offset.h10828 #define regRLC_PACE_UCODE_ADDR macro
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H A Dgc_11_0_3_offset.h10140 #define regRLC_PACE_UCODE_ADDR macro
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H A Dgc_11_5_0_offset.h9267 #define regRLC_PACE_UCODE_ADDR 0x5b6c macro
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