Searched refs:regCP_HQD_CNTL_STACK_SIZE (Results 1 - 5 of 5) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_offset.h4698 #define regCP_HQD_CNTL_STACK_SIZE 0x1fd8 macro
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H A Dgc_11_0_3_offset.h4922 #define regCP_HQD_CNTL_STACK_SIZE 0x1fd8 macro
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H A Dgc_11_5_0_offset.h3671 #define regCP_HQD_CNTL_STACK_SIZE 0x1fd8 macro
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H A Dgc_9_4_2_offset.h791 #define regCP_HQD_CNTL_STACK_SIZE 0x1274 macro
H A Dgc_9_4_3_offset.h3380 #define regCP_HQD_CNTL_STACK_SIZE 0x1274 macro

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