Searched refs:reg2 (Results 1 - 25 of 150) sorted by relevance

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/linux-master/arch/nios2/include/asm/
H A Dasm-macros.h14 * ANDs reg2 with mask and places the result in reg1.
16 * You cannnot use the same register for reg1 & reg2.
19 .macro ANDI32 reg1, reg2, mask variable
24 and \reg1, \reg1, \reg2
26 andi \reg1, \reg2, %lo(\mask) variable
29 andhi \reg1, \reg2, %hi(\mask) variable
34 * ORs reg2 with mask and places the result in reg1.
36 * It is safe to use the same register for reg1 & reg2.
39 .macro ORI32 reg1, reg2, mask variable
42 orhi \reg1, \reg2, variable
43 ori \\reg1, \\reg2, %lo(\\mask) variable
45 ori \\reg1, \\reg2, %lo(\\mask) variable
48 orhi \\reg1, \\reg2, %hi(\\mask) variable
58 .macro XORI32 reg1, reg2, mask variable
61 xorhi \\reg1, \\reg2, %hi(\\mask) variable
64 xori \\reg1, \\reg2, %lo(\\mask) variable
67 xorhi \\reg1, \\reg2, %hi(\\mask) variable
78 .macro BT reg1, reg2, bit variable
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/linux-master/arch/arm64/include/asm/
H A Dkvm_ptrauth.h26 .macro ptrauth_save_state base, reg1, reg2
28 mrs_s \reg2, SYS_APIAKEYHI_EL1 variable
29 stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APIAKEYLO_EL1)] variable
31 mrs_s \reg2, SYS_APIBKEYHI_EL1 variable
32 stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APIBKEYLO_EL1)] variable
34 mrs_s \reg2, SYS_APDAKEYHI_EL1 variable
35 stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APDAKEYLO_EL1)] variable
37 mrs_s \reg2, SYS_APDBKEYHI_EL1 variable
38 stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APDBKEYLO_EL1)] variable
40 mrs_s \reg2, SYS_APGAKEYHI_EL variable
41 stp \\reg1, \\reg2, [\\base, #PTRAUTH_REG_OFFSET(CPU_APGAKEYLO_EL1)] variable
45 ldp \\reg1, \\reg2, [\\base, #PTRAUTH_REG_OFFSET(CPU_APIAKEYLO_EL1)] variable
48 ldp \\reg1, \\reg2, [\\base, #PTRAUTH_REG_OFFSET(CPU_APIBKEYLO_EL1)] variable
51 ldp \\reg1, \\reg2, [\\base, #PTRAUTH_REG_OFFSET(CPU_APDAKEYLO_EL1)] variable
54 ldp \\reg1, \\reg2, [\\base, #PTRAUTH_REG_OFFSET(CPU_APDBKEYLO_EL1)] variable
57 ldp \\reg1, \\reg2, [\\base, #PTRAUTH_REG_OFFSET(CPU_APGAKEYLO_EL1)] variable
69 .macro ptrauth_switch_to_guest g_ctxt, reg1, reg2, reg3 variable
77 ptrauth_restore_state \\reg1, \\reg2, \\reg3 variable
81 .macro ptrauth_switch_to_hyp g_ctxt, h_ctxt, reg1, reg2, reg3 variable
89 ptrauth_save_state \\reg1, \\reg2, \\reg3 variable
91 ptrauth_restore_state \\reg1, \\reg2, \\reg3 variable
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H A Dasm-uaccess.h69 .macro user_ldp l, reg1, reg2, addr, post_inc variable
71 8889: ldtr \reg2, [\addr, #8]; variable
78 .macro user_stp l, reg1, reg2, addr, post_inc variable
80 8889: sttr \reg2, [\addr, #8]; variable
/linux-master/arch/arm/lib/
H A Dcsumpartialcopy.S29 .macro load2b, reg1, reg2
31 ldrb \reg2, [r0], #1
38 .macro load2l, reg1, reg2
40 ldr \reg2, [r0], #4
43 .macro load4l, reg1, reg2, reg3, reg4
44 ldmia r0!, {\reg1, \reg2, \reg3, \reg4}
H A Dcsumpartialcopyuser.S42 .macro load2b, reg1, reg2
44 ldrusr \reg2, r0, 1
51 .macro load2l, reg1, reg2
53 ldrusr \reg2, r0, 4
56 .macro load4l, reg1, reg2, reg3, reg4
58 ldrusr \reg2, r0, 4
H A Dmemcpy.S21 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
22 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
25 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
26 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
37 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
38 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
H A Dcopy_from_user.S46 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
48 ldr1w \ptr, \reg2, \abort
53 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
54 ldr4w \ptr, \reg1, \reg2, \reg3, \reg4, \abort
66 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
67 USERL(\abort, ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4})
70 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
71 USERL(\abort, ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8})
86 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
87 stmia \ptr!, {\reg1, \reg2, \reg
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H A Dcopy_to_user.S40 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
41 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
44 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
45 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
64 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
66 str1w \ptr, \reg2, \abort
83 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
84 USERL(\abort, stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8})
/linux-master/arch/arm/kernel/
H A Dhyp-stub.S31 .macro store_primary_cpu_mode reg1, reg2
34 str_l \reg1, __boot_cpu_mode, \reg2
43 .macro compare_cpu_mode_with_primary mode, reg1, reg2
44 adr_l \reg2, __boot_cpu_mode
45 ldr \reg1, [\reg2]
48 strne \reg1, [\reg2] @ record what happened and give up
53 .macro store_primary_cpu_mode reg1:req, reg2:req
60 .macro compare_cpu_mode_with_primary mode, reg1, reg2
/linux-master/arch/arm/probes/kprobes/
H A Dtest-core.h239 #define TEST_RR(code1, reg1, val1, code2, reg2, val2, code3) \
240 TESTCASE_START(code1 #reg1 code2 #reg2 code3) \
242 TEST_ARG_REG(reg2, val2) \
244 TEST_INSTRUCTION(code1 #reg1 code2 #reg2 code3) \
247 #define TEST_RRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4)\
248 TESTCASE_START(code1 #reg1 code2 #reg2 code3 #reg3 code4) \
250 TEST_ARG_REG(reg2, val2) \
253 TEST_INSTRUCTION(code1 #reg1 code2 #reg2 code3 #reg3 code4) \
256 #define TEST_RRRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4, reg4, val4) \
257 TESTCASE_START(code1 #reg1 code2 #reg2 code
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/linux-master/arch/s390/include/asm/
H A Dap.h139 unsigned long reg2; member in class:ap_tapq_hwinfo::__anon27::__anon29::__anon30
146 " lgr %[reg2],2\n" /* gr2 into reg2 */
147 : [reg1] "=&d" (reg1.value), [reg2] "=&d" (reg2)
151 info->value = reg2;
251 struct ap_config_info *reg2 = config; local
255 " lgr 2,%[reg2]\n" /* ptr to config into gr2 */
261 : [reg0] "d" (reg0), [reg2] "d" (reg2)
304 unsigned long reg2 = pa_ind; local
352 unsigned long reg2; local
407 unsigned long reg2 = sec_idx; local
499 unsigned long reg2; local
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/linux-master/crypto/
H A Daria_generic.c32 u32 reg0, reg1, reg2, reg3; local
45 reg2 = w0[2] ^ ck[2];
48 aria_subst_diff_odd(&reg0, &reg1, &reg2, &reg3);
69 w1[2] ^= reg2;
74 reg2 = w1[2];
79 reg2 ^= ck[6];
82 aria_subst_diff_even(&reg0, &reg1, &reg2, &reg3);
86 reg2 ^= w0[2];
91 w2[2] = reg2;
96 reg2
200 u32 reg0, reg1, reg2, reg3; local
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/linux-master/drivers/rtc/
H A Drtc-aspeed.c26 u32 reg1, reg2; local
34 reg2 = readl(rtc->base + RTC_YEAR);
36 } while (reg2 != readl(rtc->base + RTC_YEAR));
43 cent = (reg2 >> 16) & 0x1f;
44 year = (reg2 >> 8) & 0x7f;
45 tm->tm_mon = ((reg2 >> 0) & 0x0f) - 1;
56 u32 reg1, reg2, ctrl; local
65 reg2 = ((cent & 0x1f) << 16) | ((year & 0x7f) << 8) |
72 writel(reg2, rtc->base + RTC_YEAR);
/linux-master/arch/arm64/lib/
H A Dcopy_from_user.S47 .macro ldp1 reg1, reg2, ptr, val
48 user_ldp 9997f, \reg1, \reg2, \ptr, \val
51 .macro stp1 reg1, reg2, ptr, val
52 stp \reg1, \reg2, [\ptr], \val
H A Dcopy_to_user.S46 .macro ldp1 reg1, reg2, ptr, val
47 ldp \reg1, \reg2, [\ptr], \val
50 .macro stp1 reg1, reg2, ptr, val
51 user_stp 9997f, \reg1, \reg2, \ptr, \val
/linux-master/sound/soc/codecs/
H A Drt700-sdw.c90 unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2; local
106 reg2 = reg + 0x1000;
107 reg2 |= 0x80;
108 ret = regmap_write(rt700->sdw_regmap, reg2, val2);
134 reg2 = reg + 0x1000;
135 reg2 |= 0x80;
136 ret = regmap_write(rt700->sdw_regmap, reg2, (*val & 0xff));
140 reg2 = reg - 0x1000;
141 reg2 &= ~0x80;
143 reg2, ((*va
212 unsigned int reg2 = 0, reg3, reg4, nid, mask, val2; local
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H A Drt715-sdw.c152 unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2; local
168 reg2 = reg + 0x1000;
169 reg2 |= 0x80;
170 ret = regmap_write(rt715->sdw_regmap, reg2, val2);
196 reg2 = reg + 0x1000;
197 reg2 |= 0x80;
198 ret = regmap_write(rt715->sdw_regmap, reg2, (*val & 0xff));
202 reg2 = reg - 0x1000;
203 reg2 &= ~0x80;
204 ret = regmap_write(rt715->sdw_regmap, reg2,
274 unsigned int reg2 = 0, reg3, reg4, nid, mask, val2; local
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H A Drt711-sdw.c94 unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2; local
110 reg2 = reg + 0x1000;
111 reg2 |= 0x80;
112 ret = regmap_write(rt711->sdw_regmap, reg2, val2);
138 reg2 = reg + 0x1000;
139 reg2 |= 0x80;
140 ret = regmap_write(rt711->sdw_regmap, reg2, (*val & 0xff));
144 reg2 = reg - 0x1000;
145 reg2 &= ~0x80;
147 reg2, ((*va
216 unsigned int reg2 = 0, reg3, reg4, nid, mask, val2; local
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/linux-master/arch/x86/events/intel/
H A Duncore_nhmex.c354 struct hw_perf_event_extra *reg2 = &hwc->branch_reg; local
373 reg2->config = event->attr.config2;
381 struct hw_perf_event_extra *reg2 = &hwc->branch_reg; local
385 wrmsrl(reg1->reg + 1, reg2->config);
445 struct hw_perf_event_extra *reg2 = &hwc->branch_reg; local
458 reg2->config = event->attr.config2;
466 struct hw_perf_event_extra *reg2 = &hwc->branch_reg; local
471 wrmsrl(reg1->reg + 2, reg2->config);
672 struct hw_perf_event_extra *reg2 = &event->hw.branch_reg; local
693 if (reg2
741 struct hw_perf_event_extra *reg2 = &event->hw.branch_reg; local
769 struct hw_perf_event_extra *reg2 = &event->hw.branch_reg; local
839 struct hw_perf_event_extra *reg2 = &hwc->branch_reg; local
982 struct hw_perf_event_extra *reg2 = &hwc->branch_reg; local
1090 struct hw_perf_event_extra *reg2 = &event->hw.branch_reg; local
1115 struct hw_perf_event_extra *reg2 = &hwc->branch_reg; local
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/linux-master/arch/powerpc/kernel/
H A Dkvm_emul.S20 #define LL64(reg, offs, reg2) ld reg, (offs)(reg2)
21 #define STL64(reg, offs, reg2) std reg, (offs)(reg2)
23 #define LL64(reg, offs, reg2) lwz reg, (offs + 4)(reg2)
24 #define STL64(reg, offs, reg2) stw reg, (offs + 4)(reg2)
/linux-master/arch/parisc/net/
H A Dbpf_jit.h103 #define hppa_or(reg1, reg2, target) \
104 hppa_t6_insn(0x02, reg2, reg1, 0, 0, 0x09, target) /* or reg1,reg2,target */
105 #define hppa_or_cond(reg1, reg2, cond, f, target) \
106 hppa_t6_insn(0x02, reg2, reg1, cond, f, 0x09, target)
107 #define hppa_and(reg1, reg2, target) \
108 hppa_t6_insn(0x02, reg2, reg1, 0, 0, 0x08, target) /* and reg1,reg2,target */
109 #define hppa_and_cond(reg1, reg2, cond, f, target) \
110 hppa_t6_insn(0x02, reg2, reg
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/linux-master/arch/x86/crypto/
H A Dcrct10dif-pcl-asm_64.S64 # Fold reg1, reg2 into the next 32 data bytes, storing the result back into
65 # reg1, reg2.
66 .macro fold_32_bytes offset, reg1, reg2
72 movdqa \reg2, %xmm13
75 pclmulqdq $0x00, FOLD_CONSTS, \reg2
79 pxor %xmm12, \reg2
80 xorps %xmm13, \reg2
/linux-master/drivers/media/dvb-frontends/
H A Dtua6100.c65 u8 reg2[] = { 0x02, 0x00, 0x00 }; local
68 struct i2c_msg msg2 = { .addr = priv->i2c_address, .flags = 0, .buf = reg2, .len = 3 };
92 reg2[1] = (_R_VAL >> 8) & 0x03;
93 reg2[2] = _R_VAL;
95 reg2[1] |= 0x1c;
97 reg2[1] |= 0x0c;
99 reg2[1] |= 0x1c;
/linux-master/drivers/net/ethernet/sunplus/
H A Dspl2sw_mdio.c20 u32 reg, reg2; local
31 reg2 = FIELD_PREP(MAC_CPU_PHY_WT_DATA, wdata) | FIELD_PREP(MAC_CPU_PHY_CMD, cmd) |
39 writel(reg2, comm->l2sw_reg_base + L2SW_PHY_CNTL_REG0);
/linux-master/arch/arm/crypto/
H A Dcrct10dif-ce-core.S115 // Fold reg1, reg2 into the next 32 data bytes, storing the result back
116 // into reg1, reg2.
117 .macro fold_32_bytes, reg1, reg2
122 vmull.p64 q9, \reg2\()h, FOLD_CONST_H
123 vmull.p64 \reg2, \reg2\()l, FOLD_CONST_L
131 veor.8 \reg2, \reg2, q9
133 veor.8 \reg2, \reg2, q1
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