Searched refs:reg (Results 1 - 25 of 7209) sorted by relevance

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/linux-master/arch/csky/include/asm/
H A Dreg_ops.h6 #define mfcr(reg) \
10 "mfcr %0, "reg"\n" \
17 #define mtcr(reg, val) \
20 "mtcr %0, "reg"\n" \
/linux-master/arch/parisc/include/asm/
H A Dasmregs.h11 rp: .reg %r2
12 arg3: .reg %r23
13 arg2: .reg %r24
14 arg1: .reg %r25
15 arg0: .reg %r26
16 dp: .reg %r27
17 ret0: .reg %r28
18 ret1: .reg %r29
19 sl: .reg %r29
20 sp: .reg
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/linux-master/arch/mips/include/asm/
H A Dreg.h1 #include <uapi/asm/reg.h>
H A Dasm-eva.h19 #define kernel_ll(reg, addr) "ll " reg ", " addr "\n"
20 #define kernel_sc(reg, addr) "sc " reg ", " addr "\n"
21 #define kernel_lw(reg, addr) "lw " reg ", " addr "\n"
22 #define kernel_lwl(reg, addr) "lwl " reg ", " addr "\n"
23 #define kernel_lwr(reg, addr) "lwr " reg ", " add
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/linux-master/arch/x86/boot/
H A Dregs.c19 void initregs(struct biosregs *reg) argument
21 memset(reg, 0, sizeof(*reg));
22 reg->eflags |= X86_EFLAGS_CF;
23 reg->ds = ds();
24 reg->es = ds();
25 reg->fs = fs();
26 reg->gs = gs();
/linux-master/arch/x86/include/asm/
H A Dprocessor-cyrix.h8 #include <asm/pc-conf-reg.h>
10 static inline u8 getCx86(u8 reg) argument
12 return pc_conf_get(reg);
15 static inline void setCx86(u8 reg, u8 data) argument
17 pc_conf_set(reg, data);
/linux-master/drivers/media/pci/cx23885/
H A Dcx23885-ioctl.c32 struct v4l2_dbg_register *reg)
39 if ((reg->reg & 0x3) != 0 || reg->reg >= 0x10000)
42 if (mc417_register_read(dev, (u16) reg->reg, &value))
45 reg->size = 4;
46 reg->val = value;
51 struct v4l2_dbg_register *reg)
31 cx23417_g_register(struct cx23885_dev *dev, struct v4l2_dbg_register *reg) argument
50 cx23885_g_register(struct file *file, void *fh, struct v4l2_dbg_register *reg) argument
68 cx23417_s_register(struct cx23885_dev *dev, const struct v4l2_dbg_register *reg) argument
82 cx23885_s_register(struct file *file, void *fh, const struct v4l2_dbg_register *reg) argument
[all...]
/linux-master/tools/testing/selftests/powerpc/include/
H A Dvmx_asm.h9 #define PUSH_VMX(pos,reg) \
10 li reg,pos; \
11 stvx v20,reg,%r1; \
12 addi reg,reg,16; \
13 stvx v21,reg,%r1; \
14 addi reg,reg,16; \
15 stvx v22,reg,%r1; \
16 addi reg,re
[all...]
/linux-master/arch/csky/abiv1/inc/abi/
H A Dreg_ops.h7 #define cprcr(reg) \
10 asm volatile("cprcr %0, "reg"\n":"=b"(tmp)); \
14 #define cpwcr(reg, val) \
16 asm volatile("cpwcr %0, "reg"\n"::"b"(val)); \
/linux-master/include/linux/soc/brcmstb/
H A Dbrcmstb.h7 static inline u32 BRCM_ID(u32 reg) argument
9 return reg >> 28 ? reg >> 16 : reg >> 8;
12 static inline u32 BRCM_REV(u32 reg) argument
14 return reg & 0xff;
/linux-master/tools/perf/util/
H A Damd-sample-raw.c23 static void pr_ibs_fetch_ctl(union ibs_fetch_ctl reg) argument
50 if (reg.phy_addr_valid)
51 l1tlb_pgsz_str = l1tlb_pgsz_strs_erratum1347[reg.l1tlb_pgsz];
53 if (reg.phy_addr_valid)
54 l1tlb_pgsz_str = l1tlb_pgsz_strs[reg.l1tlb_pgsz];
55 ic_miss_str = ic_miss_strs[reg.ic_miss];
61 reg.l3_miss_only, reg.fetch_oc_miss, reg.fetch_l3_miss);
66 reg
73 pr_ic_ibs_extd_ctl(union ic_ibs_extd_ctl reg) argument
78 pr_ibs_op_ctl(union ibs_op_ctl reg) argument
91 pr_ibs_op_data(union ibs_op_data reg) argument
102 pr_ibs_op_data2_extended(union ibs_op_data2 reg) argument
129 pr_ibs_op_data2_default(union ibs_op_data2 reg) argument
148 pr_ibs_op_data2(union ibs_op_data2 reg) argument
155 pr_ibs_op_data3(union ibs_op_data3 reg) argument
[all...]
/linux-master/arch/riscv/include/asm/
H A Dxip_fixup.h11 .macro XIP_FIXUP_OFFSET reg
13 add \reg, \reg, t0 variable
15 .macro XIP_FIXUP_FLASH_OFFSET reg
18 sub \reg, \reg, t1 variable
19 add \reg, \reg, t0 variable
25 .macro XIP_FIXUP_OFFSET reg
27 .macro XIP_FIXUP_FLASH_OFFSET reg
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/linux-master/drivers/media/cec/platform/s5p/
H A Dexynos_hdmi_cecctrl.c26 unsigned int reg; local
30 if (regmap_read(cec->pmu, EXYNOS_HDMI_PHY_CONTROL, &reg)) {
35 reg = (reg & ~(0x3FF << 16)) | (div_ratio << 16);
37 if (regmap_write(cec->pmu, EXYNOS_HDMI_PHY_CONTROL, reg)) {
44 writeb(0x0, cec->reg + S5P_CEC_DIVISOR_3);
45 writeb(0x0, cec->reg + S5P_CEC_DIVISOR_2);
46 writeb(0x0, cec->reg + S5P_CEC_DIVISOR_1);
47 writeb(div_val, cec->reg + S5P_CEC_DIVISOR_0);
52 u8 reg; local
61 u8 reg; local
71 u8 reg; local
81 u8 reg; local
91 u8 reg; local
101 u8 reg; local
118 u8 reg; local
137 u8 reg; local
[all...]
/linux-master/drivers/media/platform/samsung/s5p-jpeg/
H A Djpeg-hw-exynos4.c18 unsigned int reg; local
20 reg = readl(base + EXYNOS4_JPEG_CNTL_REG);
21 writel(reg & ~(EXYNOS4_DEC_MODE | EXYNOS4_ENC_MODE),
24 reg = readl(base + EXYNOS4_JPEG_CNTL_REG);
25 writel(reg & ~EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG);
29 writel(reg | EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG);
34 unsigned int reg; local
36 reg = readl(base + EXYNOS4_JPEG_CNTL_REG);
39 writel((reg & EXYNOS4_ENC_DEC_MODE_MASK) |
43 writel((reg
55 unsigned int reg; local
139 unsigned int reg; local
171 unsigned int reg; local
195 unsigned int reg; local
209 unsigned int reg; local
244 unsigned int reg; local
257 unsigned int reg; local
267 unsigned int reg; local
277 unsigned int reg; local
[all...]
H A Djpeg-hw-s5p.c19 unsigned long reg; local
22 reg = readl(regs + S5P_JPG_SW_RESET);
24 while (reg != 0) {
26 reg = readl(regs + S5P_JPG_SW_RESET);
37 unsigned long reg, m; local
45 reg = readl(regs + S5P_JPGCMOD);
46 reg &= ~S5P_MOD_SEL_MASK;
47 reg |= m;
48 writel(reg, regs + S5P_JPGCMOD);
53 unsigned long reg, local
67 unsigned long reg, m; local
87 unsigned long reg; local
102 unsigned long reg; local
112 unsigned long reg; local
123 unsigned long reg; local
134 unsigned long reg; local
149 unsigned long reg; local
164 unsigned long reg; local
175 unsigned long reg; local
186 unsigned long reg; local
203 unsigned long reg; local
212 unsigned long reg; local
229 unsigned long reg; local
238 unsigned long reg, f; local
264 unsigned long reg; local
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/linux-master/drivers/net/ipa/
H A Dreg.h13 * struct reg - A register descriptor
20 struct reg { struct
34 static const struct reg reg_ ## __reg_id = { \
44 static const struct reg reg_ ## __name = { \
54 * @reg_count: Number of registers in the @reg[] array
55 * @reg: Array of register descriptors
59 const struct reg **reg; member in struct:regs
62 static inline const struct reg *reg(cons function
72 reg_fmask(const struct reg *reg, u32 field_id) argument
81 reg_bit(const struct reg *reg, u32 field_id) argument
92 reg_field_max(const struct reg *reg, u32 field_id) argument
100 reg_encode(const struct reg *reg, u32 field_id, u32 val) argument
115 reg_decode(const struct reg *reg, u32 field_id, u32 val) argument
123 reg_offset(const struct reg *reg) argument
129 reg_n_offset(const struct reg *reg, u32 n) argument
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/linux-master/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_dcn302.c41 #define DMUB_SR(reg) REG_OFFSET(reg),
48 #define DMUB_SF(reg, field) FD_MASK(reg, field),
52 #define DMUB_SF(reg, field) FD_SHIFT(reg, field),
H A Ddmub_dcn301.c41 #define DMUB_SR(reg) REG_OFFSET(reg),
48 #define DMUB_SF(reg, field) FD_MASK(reg, field),
52 #define DMUB_SF(reg, field) FD_SHIFT(reg, field),
H A Ddmub_dcn21.c41 #define DMUB_SR(reg) REG_OFFSET(reg),
48 #define DMUB_SF(reg, field) FD_MASK(reg, field),
52 #define DMUB_SF(reg, field) FD_SHIFT(reg, field),
H A Ddmub_dcn303.c42 #define DMUB_SR(reg) REG_OFFSET(reg),
49 #define DMUB_SF(reg, field) FD_MASK(reg, field),
53 #define DMUB_SF(reg, field) FD_SHIFT(reg, field),
/linux-master/arch/arm/include/asm/
H A Dinsn.h13 #define LOAD_SYM_ARMV6(reg, sym) \
18 "10: sub " #reg ", pc, #8 \n\t" \
19 "11: sub " #reg ", " #reg ", #4 \n\t" \
20 "12: ldr " #reg ", [" #reg ", #0] \n\t"
/linux-master/drivers/net/ethernet/intel/e1000e/
H A De1000e_trace.h22 TP_PROTO(uint32_t reg),
23 TP_ARGS(reg),
24 TP_STRUCT__entry(__field(uint32_t, reg)),
25 TP_fast_assign(__entry->reg = reg;),
27 __entry->reg)
/linux-master/drivers/net/ethernet/intel/i40e/
H A Di40e_io.h10 #define wr32(a, reg, value) writel((value), ((a)->hw_addr + (reg)))
11 #define rd32(a, reg) readl((a)->hw_addr + (reg))
13 #define rd64(a, reg) readq((a)->hw_addr + (reg))
/linux-master/arch/sh/include/mach-common/mach/
H A Dmagicpanelr2.h19 #define SETBITS_OUTB(mask, reg) __raw_writeb(__raw_readb(reg) | mask, reg)
20 #define SETBITS_OUTW(mask, reg) __raw_writew(__raw_readw(reg) | mask, reg)
21 #define SETBITS_OUTL(mask, reg) __raw_writel(__raw_readl(reg) | mask, reg)
22 #define CLRBITS_OUTB(mask, reg) __raw_write
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/linux-master/arch/powerpc/boot/dts/fsl/
H A Dpq3-etsec1-timer-0.dtsi37 reg = <0x24e00 0xb0>;

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