Searched refs:readw (Results 1 - 25 of 314) sorted by relevance

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/linux-master/drivers/scsi/qla4xxx/
H A Dql4_dbg.c46 readw(&ha->reg->mailbox[i]));
51 readw(&ha->reg->flash_address));
54 readw(&ha->reg->flash_data));
57 readw(&ha->reg->ctrl_status));
62 readw(&ha->reg->u1.isp4010.nvram));
66 readw(&ha->reg->u1.isp4022.intr_mask));
69 readw(&ha->reg->u1.isp4022.nvram));
72 readw(&ha->reg->u1.isp4022.semaphore));
76 readw(&ha->reg->req_q_in));
79 readw(
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/linux-master/drivers/rtc/
H A Drtc-msc313.c55 seconds = readw(priv->rtc_base + REG_RTC_MATCH_VAL_L)
56 | ((unsigned long)readw(priv->rtc_base + REG_RTC_MATCH_VAL_H) << 16);
60 if (!(readw(priv->rtc_base + REG_RTC_CTRL) & INT_MASK_BIT))
71 reg = readw(priv->rtc_base + REG_RTC_CTRL);
96 return readw(priv->rtc_base + REG_RTC_CTRL) & CNT_EN_BIT;
103 reg = readw(priv->rtc_base + REG_RTC_CTRL);
117 reg = readw(priv->rtc_base + REG_RTC_CTRL);
121 while (readw(priv->rtc_base + REG_RTC_CTRL) & READ_EN_BIT)
124 seconds = readw(priv->rtc_base + REG_RTC_CNT_VAL_L)
125 | ((unsigned long)readw(pri
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H A Drtc-mxc.c96 day = readw(ioaddr + RTC_DAYR);
97 hr_min = readw(ioaddr + RTC_HOURMIN);
98 sec = readw(ioaddr + RTC_SECOND);
101 day = readw(ioaddr + RTC_DAYALARM);
102 hr_min = readw(ioaddr + RTC_ALRM_HM) & 0xffff;
103 sec = readw(ioaddr + RTC_ALRM_SEC);
161 writew(readw(ioaddr + RTC_RTCISR), ioaddr + RTC_RTCISR);
174 reg = readw(ioaddr + RTC_RTCIENR);
195 status = readw(ioaddr + RTC_RTCISR) & readw(ioadd
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H A Drtc-ssd202d.c103 val = readw(priv->base + reg);
108 l = readw(priv->base + REG_RDDATA_L);
109 h = readw(priv->base + REG_RDDATA_H);
120 val = readw(priv->base + reg);
133 val = readw(priv->base + REG_CTRL1);
138 val = readw(priv->base + REG_CTRL1);
142 l = readw(priv->base + REG_RDCNT_L);
143 h = readw(priv->base + REG_RDCNT_H);
180 val = readw(priv->base + REG_CTRL);
/linux-master/arch/m68k/include/asm/
H A Dnettel.h90 return readw(MCFSIM_PBDAT);
95 writew((readw(MCFSIM_PBDAT) & ~mask) | bits, MCFSIM_PBDAT);
H A Dio_no.h65 #define readw readw macro
66 static inline u16 readw(const volatile void __iomem *addr) function
102 #define readw __raw_readw macro
/linux-master/drivers/scsi/arm/
H A Dcumana_1.c130 *laddr++ = readw(dma) | (readw(dma) << 16);
131 *laddr++ = readw(dma) | (readw(dma) << 16);
132 *laddr++ = readw(dma) | (readw(dma) << 16);
133 *laddr++ = readw(dma) | (readw(dma) << 16);
134 *laddr++ = readw(dma) | (readw(dm
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H A Doak.c51 while (((status = readw(base + STAT)) & 0x100)==0);
69 while (((status = readw(base + STAT)) & 0x100)==0)
87 b = (unsigned long) readw(base + DATA);
/linux-master/arch/m68k/coldfire/
H A Dm527x.c59 par = readw(MCFGPIO_PAR_TIMER);
87 par = readw(MCFGPIO_PAR_FECI2C);
103 sepmask = readw(MCFGPIO_PAR_UART);
121 par = readw(MCFGPIO_PAR_FECI2C);
127 par = readw(MCFGPIO_PAR_FECI2C);
H A Dm528x.c67 paspar = readw(MCFGPIO_PASPAR);
92 v16 = readw(MCFGPIO_PASPAR);
113 writew(readw(MCFGPIO_PEPAR) & ~(1 << (5 * 2)), MCFGPIO_PEPAR);
/linux-master/drivers/pci/
H A Drom.c94 if (readw(image) != 0xAA55) {
96 readw(image));
100 pds = image + readw(image + 24);
107 length = readw(pds + 16);
113 if (readw(image) != 0xAA55) {
/linux-master/drivers/input/keyboard/
H A Dimx_keypad.c94 reg_val = readw(keypad->mmio_base + KPDR);
98 reg_val = readw(keypad->mmio_base + KPCR);
104 reg_val = readw(keypad->mmio_base + KPCR);
113 reg_val = readw(keypad->mmio_base + KPDR);
127 reg_val = readw(keypad->mmio_base + KPDR);
135 reg_val = readw(keypad->mmio_base + KPDR);
259 reg_val = readw(keypad->mmio_base + KPSR);
263 reg_val = readw(keypad->mmio_base + KPSR);
277 reg_val = readw(keypad->mmio_base + KPSR);
281 reg_val = readw(keypa
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/linux-master/sound/isa/msnd/
H A Dmsnd_midi.c74 tail = readw(mpu->dev->MIDQ + JQS_wTail);
111 head = readw(mpu->dev->MIDQ + JQS_wHead);
112 tail = readw(mpu->dev->MIDQ + JQS_wTail);
113 size = readw(mpu->dev->MIDQ + JQS_wSize);
117 unsigned char val = readw(pwMIDQData + 2 * head);
/linux-master/drivers/media/pci/netup_unidvb/
H A Dnetup_unidvb_i2c.c72 reg = readw(&i2c->regs->twi_ctrl0_stat);
95 tmp = readw(&i2c->regs->rx_fifo.stat_ctrl);
103 tmp = readw(&i2c->regs->tx_fifo.stat_ctrl);
135 (readw(&i2c->regs->tx_fifo.stat_ctrl) & 0x3f);
148 writew(readw(&i2c->regs->tx_fifo.stat_ctrl) | FIFO_IRQEN,
156 u32 fifo_size = readw(&i2c->regs->rx_fifo.stat_ctrl) & 0x3f;
172 writew(readw(&i2c->regs->rx_fifo.stat_ctrl) | FIFO_IRQEN,
180 u16 reg = readw(&i2c->regs->twi_ctrl0_stat);
188 __func__, readw(&i2c->regs->length),
189 readw(
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H A Dnetup_unidvb_ci.c60 __func__, readw(dev->bmmio0 + CAM_CTRLSTAT_READ_SET));
66 __func__, readw(dev->bmmio0 + CAM_CTRLSTAT_READ_SET));
91 __func__, readw(dev->bmmio0 + CAM_CTRLSTAT_READ_SET));
99 ci_stat = readw(dev->bmmio0 + CAM_CTRLSTAT_READ_SET);
123 __func__, readw(dev->bmmio0 + CAM_CTRLSTAT_READ_SET));
124 ci_stat = readw(dev->bmmio0 + CAM_CTRLSTAT_READ_SET);
H A Dnetup_unidvb_spi.c78 reg = readw(&spi->regs->control_stat);
86 reg = readw(&spi->regs->control_stat);
136 __func__, readw(&spi->regs->control_stat));
232 reg = readw(&spi->regs->control_stat);
234 reg = readw(&spi->regs->control_stat);
/linux-master/include/linux/mfd/
H A Dtmio.h14 #define tmio_ioread16(addr) readw(addr)
17 (((u32)readw((addr))) | (((u32)readw((addr) + 2)) << 16))
/linux-master/arch/nios2/include/asm/
H A Dio.h21 #define readw_relaxed(addr) readw(addr)
/linux-master/drivers/watchdog/
H A Dmenz69_wdt.c39 val = readw(drv->base + MEN_Z069_WTR);
51 val = readw(drv->base + MEN_Z069_WTR);
64 val = readw(drv->base + MEN_Z069_WVR);
80 reg = readw(drv->base + MEN_Z069_WTR);
/linux-master/drivers/dma/ioat/
H A Ddca.c137 readw(ioatdca->dca_base + IOAT3_DCA_GREQID_OFFSET);
163 readw(ioatdca->dca_base + IOAT3_DCA_GREQID_OFFSET);
218 global_req_table = readw(iobase + dca_offset + IOAT3_DCA_GREQID_OFFSET);
270 dca_offset = readw(iobase + IOAT_DCAOFFSET_OFFSET);
289 csi_fsb_control = readw(ioatdca->dca_base + IOAT3_CSI_CONTROL_OFFSET);
295 pcie_control = readw(ioatdca->dca_base + IOAT3_PCI_CONTROL_OFFSET);
/linux-master/drivers/i2c/busses/
H A Di2c-wmt.c95 while (!(readw(i2c_dev->base + REG_CSR) & CSR_READY_MASK)) {
144 val = readw(i2c_dev->base + REG_CR);
157 val = readw(i2c_dev->base + REG_CR);
169 val = readw(i2c_dev->base + REG_CSR);
200 val = readw(i2c_dev->base + REG_CR);
218 val = readw(i2c_dev->base + REG_CR);
228 pmsg->buf[xfer_len] = readw(i2c_dev->base + REG_CDR) >> 8;
231 val = readw(i2c_dev->base + REG_CR) | CR_CPU_RDY;
281 i2c_dev->cmd_status = readw(i2c_dev->base + REG_ISR);
311 readw(i2c_de
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/linux-master/drivers/tty/
H A Dmoxa.c538 while (readw(ofsAddr + FuncCode) != 0)
541 if (readw(ofsAddr + FuncCode) != 0)
563 ret = readw(ofsAddr + FuncArg);
573 rptr = readw(ofsAddr + RXrptr);
574 wptr = readw(ofsAddr + RXwptr);
575 mask = readw(ofsAddr + RX_mask);
774 tmp = readw(baseAddr + C218_key);
779 tmp = readw(baseAddr + C218_key);
784 tmp = readw(baseAddr + C320_key);
787 tmp = readw(baseAdd
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/linux-master/arch/arm/mach-spear/
H A Dtime.c83 val = readw(gpt_base + CR(CLKSRC));
95 u16 val = readw(gpt_base + CR(CLKEVT));
116 val = readw(gpt_base + CR(CLKEVT));
135 val = readw(gpt_base + CR(CLKEVT));
157 u16 val = readw(gpt_base + CR(CLKEVT));
/linux-master/arch/hexagon/include/asm/
H A Dio.h86 static inline u16 readw(const volatile void __iomem *addr) function
150 #define __raw_readw readw
206 return readw(_IO_BASE + (port & IO_SPACE_LIMIT));
317 #define readw readw macro
/linux-master/drivers/irqchip/
H A Dirq-ts4800.c36 u16 reg = readw(data->base + IRQ_MASK);
45 u16 reg = readw(data->base + IRQ_MASK);
85 u16 status = readw(data->base + IRQ_STATUS);

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