Searched refs:rFPGA0_TxGainStage (Results 1 - 5 of 5) sorted by last modified time

/linux-master/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_phy.c409 rtl92e_set_bb_reg(dev, rFPGA0_TxGainStage,
H A Dr8192E_phyreg.h47 #define rFPGA0_TxGainStage 0x80c macro
/linux-master/drivers/staging/rtl8712/
H A Drtl871x_mp_phy_regdef.h89 #define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ macro
442 #define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */
H A Drtl871x_mp.c319 set_bb_reg(pAdapter, rFPGA0_TxGainStage,
/linux-master/drivers/staging/rtl8723bs/include/
H A DHal8192CPhyReg.h97 #define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ macro
527 #define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */

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