/linux-master/drivers/net/ethernet/marvell/octeon_ep_vf/ |
H A D | octep_vf_cnxk.c | 17 static void cnxk_vf_dump_q_regs(struct octep_vf_device *oct, int qno) argument 21 dev_info(dev, "IQ-%d register dump\n", qno); 23 qno, CNXK_VF_SDP_R_IN_INSTR_DBELL(qno), 24 octep_vf_read_csr64(oct, CNXK_VF_SDP_R_IN_INSTR_DBELL(qno))); 26 qno, CNXK_VF_SDP_R_IN_CONTROL(qno), 27 octep_vf_read_csr64(oct, CNXK_VF_SDP_R_IN_CONTROL(qno))); 29 qno, CNXK_VF_SDP_R_IN_ENABLE(qno), [all...] |
H A D | octep_vf_cn9k.c | 17 static void cn93_vf_dump_q_regs(struct octep_vf_device *oct, int qno) argument 21 dev_info(dev, "IQ-%d register dump\n", qno); 23 qno, CN93_VF_SDP_R_IN_INSTR_DBELL(qno), 24 octep_vf_read_csr64(oct, CN93_VF_SDP_R_IN_INSTR_DBELL(qno))); 26 qno, CN93_VF_SDP_R_IN_CONTROL(qno), 27 octep_vf_read_csr64(oct, CN93_VF_SDP_R_IN_CONTROL(qno))); 29 qno, CN93_VF_SDP_R_IN_ENABLE(qno), [all...] |
/linux-master/drivers/net/wwan/t7xx/ |
H A D | t7xx_cldma.c | 63 void t7xx_cldma_hw_start_queue(struct t7xx_cldma_hw *hw_info, unsigned int qno, argument 71 val = qno == CLDMA_ALL_Q ? CLDMA_ALL_Q : BIT(qno); 105 bool t7xx_cldma_tx_addr_is_set(struct t7xx_cldma_hw *hw_info, unsigned int qno) argument 107 u32 offset = REG_CLDMA_UL_START_ADDRL_0 + qno * ADDR_SIZE; 112 void t7xx_cldma_hw_set_start_addr(struct t7xx_cldma_hw *hw_info, unsigned int qno, u64 address, argument 115 u32 offset = qno * ADDR_SIZE; 123 void t7xx_cldma_hw_resume_queue(struct t7xx_cldma_hw *hw_info, unsigned int qno, argument 129 iowrite32(BIT(qno), base + REG_CLDMA_DL_RESUME_CMD); 131 iowrite32(BIT(qno), bas 134 t7xx_cldma_hw_queue_status(struct t7xx_cldma_hw *hw_info, unsigned int qno, enum mtk_txrx tx_rx) argument 182 t7xx_cldma_hw_irq_dis_txrx(struct t7xx_cldma_hw *hw_info, unsigned int qno, enum mtk_txrx tx_rx) argument 194 t7xx_cldma_hw_irq_dis_eq(struct t7xx_cldma_hw *hw_info, unsigned int qno, enum mtk_txrx tx_rx) argument 205 t7xx_cldma_hw_irq_en_txrx(struct t7xx_cldma_hw *hw_info, unsigned int qno, enum mtk_txrx tx_rx) argument 217 t7xx_cldma_hw_irq_en_eq(struct t7xx_cldma_hw *hw_info, unsigned int qno, enum mtk_txrx tx_rx) argument [all...] |
H A D | t7xx_cldma.h | 153 void t7xx_cldma_hw_irq_dis_txrx(struct t7xx_cldma_hw *hw_info, unsigned int qno, 155 void t7xx_cldma_hw_irq_dis_eq(struct t7xx_cldma_hw *hw_info, unsigned int qno, 157 void t7xx_cldma_hw_irq_en_txrx(struct t7xx_cldma_hw *hw_info, unsigned int qno, 159 void t7xx_cldma_hw_irq_en_eq(struct t7xx_cldma_hw *hw_info, unsigned int qno, enum mtk_txrx tx_rx); 160 unsigned int t7xx_cldma_hw_queue_status(struct t7xx_cldma_hw *hw_info, unsigned int qno, 163 void t7xx_cldma_hw_resume_queue(struct t7xx_cldma_hw *hw_info, unsigned int qno, 166 void t7xx_cldma_hw_start_queue(struct t7xx_cldma_hw *hw_info, unsigned int qno, 172 unsigned int qno, u64 address, enum mtk_txrx tx_rx); 179 bool t7xx_cldma_tx_addr_is_set(struct t7xx_cldma_hw *hw_info, unsigned int qno);
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H A D | t7xx_dpmaif.h | 155 struct dpmaif_hw_intr_st_para *para, int qno); 164 unsigned int qno); 165 void t7xx_dpmaif_dlq_unmask_rx_done(struct dpmaif_hw_info *hw_info, unsigned int qno); 166 bool t7xx_dpmaif_ul_clr_done(struct dpmaif_hw_info *hw_info, unsigned int qno);
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H A D | t7xx_dpmaif.c | 143 static int t7xx_mask_dlq_intr(struct dpmaif_hw_info *hw_info, unsigned int qno) argument 148 q_done = qno == DPF_RX_QNO0 ? DPMAIF_DL_INT_DLQ0_QDONE : DPMAIF_DL_INT_DLQ1_QDONE; 164 void t7xx_dpmaif_dlq_unmask_rx_done(struct dpmaif_hw_info *hw_info, unsigned int qno) argument 168 mask = qno == DPF_RX_QNO0 ? DPMAIF_DL_INT_DLQ0_QDONE : DPMAIF_DL_INT_DLQ1_QDONE; 182 unsigned int qno) 184 if (qno == DPF_RX_QNO0) 193 unsigned int qno) 195 if (qno == DPF_RX_QNO0) 265 struct dpmaif_hw_intr_st_para *para, int qno) 267 if (qno 181 t7xx_dpmaif_dlq_mask_rx_pitcnt_len_err_intr(struct dpmaif_hw_info *hw_info, unsigned int qno) argument 192 t7xx_dpmaif_dlq_unmask_pitcnt_len_err_intr(struct dpmaif_hw_info *hw_info, unsigned int qno) argument 263 t7xx_dpmaif_hw_check_rx_intr(struct dpmaif_hw_info *hw_info, unsigned int intr_status, struct dpmaif_hw_intr_st_para *para, int qno) argument 344 t7xx_dpmaif_hw_get_intr_cnt(struct dpmaif_hw_info *hw_info, struct dpmaif_hw_intr_st_para *para, int qno) argument 1269 t7xx_dpmaif_ul_clr_done(struct dpmaif_hw_info *hw_info, unsigned int qno) argument [all...] |
H A D | t7xx_netdev.c | 436 static void t7xx_ccmni_queue_tx_irq_notify(struct t7xx_ccmni_ctrl *ctlb, int qno) argument 442 net_queue = netdev_get_tx_queue(ccmni->dev, qno); 448 static void t7xx_ccmni_queue_tx_full_notify(struct t7xx_ccmni_ctrl *ctlb, int qno) argument 454 netdev_err(ccmni->dev, "TX queue %d is full\n", qno); 455 net_queue = netdev_get_tx_queue(ccmni->dev, qno); 461 enum dpmaif_txq_state state, int qno) 474 t7xx_ccmni_queue_tx_irq_notify(ctlb, qno); 476 t7xx_ccmni_queue_tx_full_notify(ctlb, qno); 460 t7xx_ccmni_queue_state_notify(struct t7xx_pci_dev *t7xx_dev, enum dpmaif_txq_state state, int qno) argument
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H A D | t7xx_hif_cldma.c | 875 static void t7xx_cldma_hw_start_send(struct cldma_ctrl *md_ctrl, int qno, argument 881 if (!t7xx_cldma_tx_addr_is_set(hw_info, qno)) { 883 t7xx_cldma_hw_set_start_addr(hw_info, qno, prev_req->gpd_addr, MTK_TX); 884 md_ctrl->txq_started &= ~BIT(qno); 887 if (!t7xx_cldma_hw_queue_status(hw_info, qno, MTK_TX)) { 888 if (md_ctrl->txq_started & BIT(qno)) 889 t7xx_cldma_hw_resume_queue(hw_info, qno, MTK_TX); 891 t7xx_cldma_hw_start_queue(hw_info, qno, MTK_TX); 893 md_ctrl->txq_started |= BIT(qno); 911 * @qno 921 t7xx_cldma_send_skb(struct cldma_ctrl *md_ctrl, int qno, struct sk_buff *skb) argument 997 int qno; local 1111 int qno; local [all...] |
H A D | t7xx_hif_cldma.h | 131 int t7xx_cldma_send_skb(struct cldma_ctrl *md_ctrl, int qno, struct sk_buff *skb);
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H A D | t7xx_hif_dpmaif.c | 424 int qno; local 426 for (qno = 0; qno < DPMAIF_RXQ_NUM; qno++) 427 t7xx_dpmaif_dlq_unmask_rx_done(&dpmaif_ctrl->hw_info, qno);
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H A D | t7xx_hif_dpmaif_rx.c | 893 int qno, ret; local 895 qno = ffs(que_mask) - 1; 896 if (qno < 0 || qno > DPMAIF_RXQ_NUM - 1) { 897 dev_err(dpmaif_ctrl->dev, "Invalid RXQ number: %u\n", qno); 901 rxq = &dpmaif_ctrl->rxq[qno];
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/linux-master/drivers/net/ethernet/marvell/octeon_ep/ |
H A D | octep_cn9k_pf.c | 40 static void cn93_dump_regs(struct octep_device *oct, int qno) argument 44 dev_info(dev, "IQ-%d register dump\n", qno); 46 qno, CN93_SDP_R_IN_INSTR_DBELL(qno), 47 octep_read_csr64(oct, CN93_SDP_R_IN_INSTR_DBELL(qno))); 49 qno, CN93_SDP_R_IN_CONTROL(qno), 50 octep_read_csr64(oct, CN93_SDP_R_IN_CONTROL(qno))); 52 qno, CN93_SDP_R_IN_ENABLE(qno), [all...] |
H A D | octep_cnxk_pf.c | 60 static void cnxk_dump_regs(struct octep_device *oct, int qno) argument 64 dev_info(dev, "IQ-%d register dump\n", qno); 66 qno, CNXK_SDP_R_IN_INSTR_DBELL(qno), 67 octep_read_csr64(oct, CNXK_SDP_R_IN_INSTR_DBELL(qno))); 69 qno, CNXK_SDP_R_IN_CONTROL(qno), 70 octep_read_csr64(oct, CNXK_SDP_R_IN_CONTROL(qno))); 72 qno, CNXK_SDP_R_IN_ENABLE(qno), [all...] |
/linux-master/drivers/crypto/cavium/nitrox/ |
H A D | nitrox_hal.h | 21 void enable_aqm_ring(struct nitrox_device *ndev, int qno);
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H A D | nitrox_lib.c | 113 cmdq->qno = i; 167 cmdq->qno = i;
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H A D | nitrox_dev.h | 34 * @qno: command queue number 60 u8 qno; member in struct:nitrox_cmdq
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H A D | nitrox_reqmgr.c | 388 int qno, ret = 0; local 425 qno = smp_processor_id() % ndev->nr_queues; 427 sr->cmdq = &ndev->pkt_inq[qno]; 464 sr->instr.irh.s.destport = SOLICIT_BASE_DPORT + qno;
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/linux-master/drivers/crypto/cavium/cpt/ |
H A D | cptvf_reqmanager.c | 35 int qno) 37 struct pending_queue *queue = &pqinfo->queue[qno]; 224 u32 qno) 233 if (unlikely(qno >= cptvf->nr_queues)) { 234 dev_err(&pdev->dev, "Invalid queue (qno: %d, nr_queues: %d)\n", 235 qno, cptvf->nr_queues); 240 queue = &qinfo->queue[qno]; 326 int qno) 329 struct pending_queue *pqueue = &pqinfo->queue[qno]; 346 pending_queue_inc_front(pqinfo, qno); 34 pending_queue_inc_front(struct pending_qinfo *pqinfo, int qno) argument 223 send_cpt_command(struct cpt_vf *cptvf, union cpt_inst_s *cmd, u32 qno) argument 324 process_pending_queue(struct cpt_vf *cptvf, struct pending_qinfo *pqinfo, int qno) argument 541 vq_post_process(struct cpt_vf *cptvf, u32 qno) argument [all...] |
H A D | cptvf.h | 127 void vq_post_process(struct cpt_vf *cptvf, u32 qno);
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H A D | request_manager.h | 144 void vq_post_process(struct cpt_vf *cptvf, u32 qno);
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H A D | cptvf_main.c | 17 u32 qno; member in struct:cptvf_wqe 29 vq_post_process(cwqe->cptvf, cwqe->qno); 50 cwqe_info->vq_wqe[i].qno = i; 554 int qno) 558 if (unlikely(qno >= cptvf->nr_queues)) 562 return &nwqe_info->vq_wqe[qno]; 553 get_cptvf_vq_wqe(struct cpt_vf *cptvf, int qno) argument
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/linux-master/drivers/net/ethernet/cavium/liquidio/ |
H A D | octeon_network.h | 574 int i, qno; local 577 qno = lio->linfo.txpciq[i % lio->oct_dev->num_iqs].s.q_no; 580 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, qno,
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/linux-master/drivers/net/wireless/rsi/ |
H A D | rsi_mgmt.h | 708 static inline void rsi_set_len_qno(__le16 *addr, u16 len, u8 qno) argument 710 *addr = cpu_to_le16(len | ((qno & 7) << 12));
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/linux-master/drivers/crypto/marvell/octeontx/ |
H A D | otx_cptvf_main.c | 537 int qno) 541 if (unlikely(qno >= cptvf->num_queues)) 545 return &nwqe_info->vq_wqe[qno]; 536 get_cptvf_vq_wqe(struct otx_cptvf *cptvf, int qno) argument
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/linux-master/drivers/scsi/lpfc/ |
H A D | lpfc_nvmet.c | 2186 uint32_t *payload, qno; local 2260 qno = nvmebuf->idx; 2262 phba, phba->sli4_hba.nvmet_mrq_hdr[qno], 2263 phba->sli4_hba.nvmet_mrq_data[qno], 1, qno); 2378 uint32_t size, oxid, sid, qno; local 2444 qno = nvmebuf->idx; 2446 phba, phba->sli4_hba.nvmet_mrq_hdr[qno], 2447 phba->sli4_hba.nvmet_mrq_data[qno], 1, qno); [all...] |