Searched refs:psr (Results 1 - 25 of 101) sorted by relevance

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/linux-master/arch/sparc/include/asm/
H A Dpsr.h3 * psr.h: This file holds the macros for masking off various parts of
14 #include <uapi/asm/psr.h>
18 /* Get the %psr register. */
21 unsigned int psr; local
23 "rd %%psr, %0\n\t"
27 : "=r" (psr)
31 return psr;
37 "wr %0, 0x0, %%psr\n\t"
47 * enable bit is set in the %psr when you execute this or you will
H A Dhead_32.h7 #define WRITE_PAUSE nop; nop; nop; /* Have to do this after %wim/%psr chg */
13 rd %psr, %l0; b label; rd %wim, %l3; nop;
16 #define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7;
17 #define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7;
21 rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3;
38 rd %psr, %l0;
42 rd %psr,%l0; \
50 rd %psr,%l0; \
59 b getcc_trap_handler; rd %psr, %l0; nop; nop;
63 b setcc_trap_handler; rd %psr,
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H A Dirqflags_32.h17 #include <asm/psr.h>
27 asm volatile("rd %%psr, %0" : "=r" (flags));
H A Dprocessor_32.h10 #include <asm/psr.h>
61 regs->psr = (regs->psr & (PSR_CWP)) | PSR_S;
H A Dsyscall.h43 return (regs->psr & PSR_C) ? true : false;
47 regs->psr |= PSR_C;
51 regs->psr &= ~PSR_C;
H A Dswitch_to_32.h24 (prv)->thread.kregs->psr &= ~PSR_EF; \
34 (nxt)->thread.kregs->psr&=~PSR_EF; \
66 "rd %%psr, %%g4\n\t" \
69 "wr %%g4, 0x20, %%psr\n\t" \
77 "wr %%g4, 0x20, %%psr\n\t" \
85 "wr %%g4, 0x0, %%psr\n\t" \
H A Dptrace.h124 return (regs->psr & PSR_SYSCALL);
129 return (regs->psr &= ~PSR_SYSCALL);
143 #define user_mode(regs) (!((regs)->psr & PSR_PS))
H A Dsigcontext.h40 unsigned int psr; member in struct:__anon1166::__anon1167
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_psr.c176 #define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
177 (intel_dp)->psr.source_support)
179 #define CAN_PANEL_REPLAY(intel_dp) ((intel_dp)->psr.sink_panel_replay_support && \
180 (intel_dp)->psr.source_panel_replay_support)
196 switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
199 return connector->panel.vbt.psr.enable;
212 switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
228 EDP_PSR_ERROR(intel_dp->psr.transcoder);
236 EDP_PSR_POST_EXIT(intel_dp->psr.transcoder);
244 EDP_PSR_PRE_ENTRY(intel_dp->psr
820 struct intel_psr *psr = &intel_dp->psr; local
1572 struct intel_psr *psr = &intel_dp->psr; local
1900 struct intel_psr *psr = &intel_dp->psr; local
1933 struct intel_psr *psr = &intel_dp->psr; local
2405 struct intel_psr *psr = &intel_dp->psr; local
2448 struct intel_psr *psr = &intel_dp->psr; local
2679 struct intel_psr *psr = &intel_dp->psr; local
2994 struct intel_psr *psr = &intel_dp->psr; local
3021 struct intel_psr *psr = &intel_dp->psr; local
3045 struct intel_psr *psr = &intel_dp->psr; local
3209 struct intel_psr *psr = &intel_dp->psr; local
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/linux-master/arch/sparc/include/uapi/asm/
H A Dpsrcompat.h38 static inline unsigned long psr_to_tstate_icc(unsigned int psr) argument
40 unsigned long tstate = ((unsigned long)(psr & PSR_ICC)) << 12;
41 if ((psr & (PSR_VERS|PSR_IMPL)) == PSR_V8PLUS)
42 tstate |= ((unsigned long)(psr & PSR_XCC)) << 20;
/linux-master/arch/powerpc/platforms/powernv/
H A Dopal-psr.c8 #define pr_fmt(fmt) "opal-psr: " fmt
30 int psr, ret, token; local
43 (u32 *)__pa(&psr));
54 ret = sprintf(buf, "%u\n", be32_to_cpu(psr));
60 ret = sprintf(buf, "%u\n", be32_to_cpu(psr));
80 int psr, ret, token; local
82 ret = kstrtoint(buf, 0, &psr);
96 ret = opal_set_power_shift_ratio(psr_attr->handle, token, psr);
125 struct device_node *psr, *node; local
128 psr
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/linux-master/arch/sparc/kernel/
H A Dtraps_32.c90 make_task_dead((regs->psr & PSR_PS) ? SIGKILL : SIGSEGV);
101 if(regs->psr & PSR_PS)
109 unsigned long psr)
111 if(psr & PSR_PS)
122 unsigned long psr)
124 if(psr & PSR_PS)
132 unsigned long psr)
134 if(regs->psr & PSR_PS) {
158 unsigned long psr)
161 if(psr
108 do_illegal_instruction(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
121 do_priv_instruction(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
131 do_memaccess_unaligned(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
157 do_fpd_trap(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
199 do_fpe_trap(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
302 handle_tag_overflow(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
310 handle_watchpoint(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
322 handle_reg_access(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
332 handle_cp_disabled(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
338 handle_cp_exception(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
348 handle_hw_divzero(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
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H A Dentry.h16 unsigned long npc, unsigned long psr);
19 unsigned long npc, unsigned long psr);
21 unsigned long npc, unsigned long psr);
23 unsigned long npc, unsigned long psr);
25 unsigned long npc, unsigned long psr);
27 unsigned long npc, unsigned long psr);
29 unsigned long npc, unsigned long psr);
31 unsigned long npc, unsigned long psr);
33 unsigned long npc, unsigned long psr);
35 unsigned long npc, unsigned long psr);
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H A Dtrampoline_32.S10 #include <asm/psr.h>
25 * in and sets PIL in %psr to 15, no irqs.
45 /* Set up a sane %psr -- PIL<0xf> S<0x1> PS<0x1> CWP<0x0> */
47 wr %g1, 0x0, %psr ! traps off though
70 rd %psr, %g1
71 wr %g1, PSR_ET, %psr ! traps on
99 /* Set up a sane %psr -- PIL<0xf> S<0x1> PS<0x1> CWP<0x0> */
101 wr %g1, 0x0, %psr ! traps off though
131 rd %psr, %g1
132 wr %g1, PSR_ET, %psr ! trap
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H A Dentry.S22 #include <asm/psr.h>
159 wr %l0, 0x0, %psr
181 wr %l4, 0x0, %psr
183 wr %l4, PSR_ET, %psr
200 wr %l0, PSR_ET, %psr
230 wr %g2, 0x0, %psr
232 wr %g2, PSR_ET, %psr
239 wr %g2, PSR_ET, %psr ! keep ET up
249 wr %g2, 0x0, %psr
251 wr %g2, PSR_ET, %psr
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H A Dsignal_32.c107 up_psr = regs->psr;
110 /* User can only change condition codes and FPU enabling in %psr. */
111 regs->psr = (up_psr & ~(PSR_ICC | PSR_EF))
112 | (regs->psr & (PSR_ICC | PSR_EF));
144 unsigned int psr, pc, npc, ufp; local
166 err |= __get_user(psr, &sf->regs.psr);
171 regs->psr = (regs->psr & ~PSR_ICC) | (psr
326 unsigned int psr; local
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H A Dsigutil_32.c23 regs->psr &= ~(PSR_EF);
32 regs->psr &= ~(PSR_EF);
58 regs->psr &= ~PSR_EF;
62 regs->psr &= ~PSR_EF;
H A Dkgdb_32.c38 gdb_regs[GDB_PSR] = regs->psr;
93 if (regs->psr != gdb_regs[GDB_PSR]) {
94 unsigned long cwp = regs->psr & PSR_CWP;
96 regs->psr = (gdb_regs[GDB_PSR] & ~PSR_CWP) | cwp;
H A Dwof.S11 #include <asm/psr.h>
34 #define t_psr l0 /* %psr at trap time T */
60 * rd %psr, %l0
122 wr %t_psr, 0x0, %psr ! restore condition codes in %psr
191 wr %t_psr, 0x0, %psr
207 rd %psr, %glob_tmp
253 wr %t_psr, PSR_ET, %psr
279 /* Restore globals, condition codes in the %psr and
286 wr %t_psr, 0x0, %psr
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/linux-master/arch/arm/kernel/
H A Dopcodes.c52 asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr) argument
55 u32 psr_cond = psr >> 28;
/linux-master/arch/arm/mm/
H A Dabort-macro.S13 .macro do_thumb_abort, fsr, pc, psr, tmp
14 tst \psr, #PSR_T_BIT
H A Dabort-ev4t.S10 * : r5 = aborted context psr
23 do_thumb_abort fsr=r1, pc=r4, psr=r5, tmp=r3
/linux-master/drivers/cpufreq/
H A Dmaple-cpufreq.c94 unsigned long psr = scom970_read(SCOM_PSR); local
96 if ((psr & PSR_CMD_RECEIVED) == 0 &&
97 (((psr >> PSR_CUR_SPEED_SHIFT) ^
101 if (psr & PSR_CMD_COMPLETED)
116 unsigned long psr = scom970_read(SCOM_PSR); local
120 if ((((psr >> PSR_CUR_SPEED_SHIFT) ^
/linux-master/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_edp_panel_control.c558 struct dmub_psr *psr = dc->res_pool->psr; local
561 if (psr == NULL && force_static)
576 if (psr != NULL && link->psr_settings.psr_feature_enabled && psr->funcs->psr_set_power_opt)
577 psr->funcs->psr_set_power_opt(psr, link->psr_settings.psr_power_opt, panel_inst);
580 if (psr != NULL && link->psr_settings.psr_feature_enabled &&
581 force_static && psr->funcs->psr_force_static)
582 psr
606 struct dmub_psr *psr = dc->res_pool->psr; local
663 struct dmub_psr *psr; local
855 struct dmub_psr *psr = dc->res_pool->psr; local
870 struct dmub_psr *psr = dc->res_pool->psr; local
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/linux-master/arch/arm64/include/asm/
H A Dptrace.h149 static inline unsigned long compat_psr_to_pstate(const unsigned long psr) argument
153 pstate = psr & ~COMPAT_PSR_DIT_BIT;
155 if (psr & COMPAT_PSR_DIT_BIT)
163 unsigned long psr; local
165 psr = pstate & ~PSR_AA32_DIT_BIT;
168 psr |= COMPAT_PSR_DIT_BIT;
170 return psr;

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