/linux-master/sound/soc/uniphier/ |
H A D | aio-cpu.c | 23 static bool is_valid_pll(struct uniphier_aio_chip *chip, int pll_id) argument 27 if (pll_id < 0 || chip->num_plls <= pll_id) { 28 dev_err(dev, "PLL(%d) is not supported\n", pll_id); 32 return chip->plls[pll_id].enable; 121 * @pll_id: PLL ID, should be AUD_PLL_XX 128 static int find_divider(struct uniphier_aio *aio, int pll_id, unsigned int freq) argument 135 if (!is_valid_pll(aio->chip, pll_id)) 138 pll = &aio->chip->plls[pll_id]; 152 int pll_id, div_i local 217 uniphier_aio_set_pll(struct snd_soc_dai *dai, int pll_id, int source, unsigned int freq_in, unsigned int freq_out) argument [all...] |
/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_pll.c | 281 if (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID) 282 pll_in_use |= (1 << test_amdgpu_crtc->pll_id); 309 if (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID) 310 return test_amdgpu_crtc->pll_id; 346 if (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID) 347 return test_amdgpu_crtc->pll_id; 354 (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID)) 355 return test_amdgpu_crtc->pll_id;
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H A D | atombios_crtc.c | 242 int pll_id, 265 pll_id == adev->mode_info.crtcs[i]->pll_id) { 279 switch (pll_id) { 563 static bool is_pixel_clock_source_from_pll(u32 encoder_mode, int pll_id) argument 566 if (pll_id < ATOM_EXT_PLL1) 577 int pll_id, 612 args.v1.ucPpll = pll_id; 622 args.v2.ucPpll = pll_id; 632 args.v3.ucPpll = pll_id; 240 amdgpu_atombios_crtc_program_ss(struct amdgpu_device *adev, int enable, int pll_id, int crtc_id, struct amdgpu_atom_ss *ss) argument 575 amdgpu_atombios_crtc_program_pll(struct drm_crtc *crtc, u32 crtc_id, int pll_id, u32 encoder_mode, u32 encoder_id, u32 clock, u32 ref_div, u32 fb_div, u32 frac_fb_div, u32 post_div, int bpc, bool ss_enabled, struct amdgpu_atom_ss *ss) argument [all...] |
H A D | atombios_crtc.h | 44 int pll_id,
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/ |
H A D | dce112_clk_mgr.c | 86 dce_clk_params.pll_id = CLOCK_SOURCE_ID_DFS; 107 (dce_clk_params.pll_id == 140 dce_clk_params.pll_id = CLOCK_SOURCE_ID_DFS; 175 dce_clk_params.pll_id = CLOCK_SOURCE_ID_DFS; 180 (dce_clk_params.pll_id ==
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/linux-master/drivers/clk/mediatek/ |
H A D | clk-pllfh.c | 50 int num_fhs, int pll_id) 55 if (pllfhs[i].data.pll_id == pll_id) 66 u32 num_clocks, pll_id, ssc_rate; local 92 of_property_read_u32_index(node, "clocks", offset + 1, &pll_id); 97 pllfh = get_pllfh_by_id(pllfhs, num_fhs, pll_id); 49 get_pllfh_by_id(struct mtk_pllfh_data *pllfhs, int num_fhs, int pll_id) argument
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H A D | clk-pllfh.h | 19 int pll_id; member in struct:fh_pll_data
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/linux-master/drivers/gpu/drm/amd/display/include/ |
H A D | bios_parser_types.h | 151 enum clock_source_id pll_id; /* needed for DCE 4.0 */ member in struct:bp_transmitter_control 219 enum clock_source_id pll_id; /* Clock Source Id */ member in struct:bp_pixel_clock_parameters 267 enum clock_source_id pll_id; /* Clock Source Id */ member in struct:bp_set_dce_clock_parameters 294 enum clock_source_id pll_id; member in struct:bp_spread_spectrum_parameters
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/linux-master/drivers/gpu/drm/amd/display/dc/bios/ |
H A D | command_table.c | 557 uint32_t pll_id; local 579 if (!cmd->clock_source_id_to_atom(cntl->pll_id, &pll_id)) 675 params.acConfig.ucRefClkSource = (uint8_t)pll_id; 711 if (!cmd->clock_source_id_to_ref_clk_src(cntl->pll_id, &ref_clk_src_id)) 825 cmd->clock_source_id_to_atom_phy_clk_src_id(cntl->pll_id); 984 if (CLOCK_SOURCE_ID_PLL1 == bp_params->pll_id) 986 else if (CLOCK_SOURCE_ID_PLL2 == bp_params->pll_id) 1053 uint32_t pll_id; local 1057 if (bp->cmd_helper->clock_source_id_to_atom(bp_params->pll_id, 1123 uint32_t pll_id; local 1215 uint32_t pll_id; local [all...] |
H A D | command_table2.c | 442 uint32_t pll_id; local 446 if (bp->cmd_helper->clock_source_id_to_atom(bp_params->pll_id, &pll_id) 469 clk.pll_id = (uint8_t) pll_id; 489 pll_id, bp_params->color_depth); 886 if (!cmd->clock_source_id_to_atom(bp_params->pll_id, &atom_pll_id) ||
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/linux-master/drivers/gpu/drm/radeon/ |
H A D | atombios_crtc.c | 395 static void atombios_disable_ss(struct radeon_device *rdev, int pll_id) argument 400 switch (pll_id) { 416 switch (pll_id) { 445 int pll_id, 468 pll_id == rdev->mode_info.crtcs[i]->pll_id) { 483 switch (pll_id) { 502 switch (pll_id) { 524 args.v1.ucPpll = pll_id; 529 atombios_disable_ss(rdev, pll_id); 443 atombios_crtc_program_ss(struct radeon_device *rdev, int enable, int pll_id, int crtc_id, struct radeon_atom_ss *ss) argument 815 atombios_crtc_program_pll(struct drm_crtc *crtc, u32 crtc_id, int pll_id, u32 encoder_mode, u32 encoder_id, u32 clock, u32 ref_div, u32 fb_div, u32 frac_fb_div, u32 post_div, int bpc, bool ss_enabled, struct radeon_atom_ss *ss) argument [all...] |
/linux-master/sound/soc/codecs/ |
H A D | adav80x.c | 622 static int adav80x_set_pll(struct snd_soc_component *component, int pll_id, argument 657 pll_ctrl2 |= ADAV80X_PLL_CTRL2_DOUB(pll_id); 664 pll_ctrl2 |= ADAV80X_PLL_CTRL2_FS_32(pll_id); 667 pll_ctrl2 |= ADAV80X_PLL_CTRL2_FS_44(pll_id); 670 pll_ctrl2 |= ADAV80X_PLL_CTRL2_FS_48(pll_id); 679 ADAV80X_PLL_CTRL2_PLL_MASK(pll_id), pll_ctrl2); 683 pll_src = ADAV80X_PLL_CLK_SRC_PLL_MCLKI(pll_id); 685 pll_src = ADAV80X_PLL_CLK_SRC_PLL_XIN(pll_id); 688 ADAV80X_PLL_CLK_SRC_PLL_MASK(pll_id), pll_src);
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H A D | adau1373.c | 552 unsigned int pll_id = w->name[3] - '1'; local 560 regmap_update_bits(adau1373->regmap, ADAU1373_PLL_CTRL6(pll_id), 1251 static int adau1373_set_pll(struct snd_soc_component *component, int pll_id, argument 1259 switch (pll_id) { 1304 regmap_update_bits(adau1373->regmap, ADAU1373_PLL_CTRL6(pll_id), 1307 regmap_update_bits(adau1373->regmap, ADAU1373_PLL_CTRL6(pll_id), 1312 regmap_write(adau1373->regmap, ADAU1373_DPLL_CTRL(pll_id), 1314 regmap_write(adau1373->regmap, ADAU1373_PLL_CTRL1(pll_id), pll_regs[0]); 1315 regmap_write(adau1373->regmap, ADAU1373_PLL_CTRL2(pll_id), pll_regs[1]); 1316 regmap_write(adau1373->regmap, ADAU1373_PLL_CTRL3(pll_id), pll_reg [all...] |
H A D | alc5632.c | 677 static int alc5632_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, argument 685 if (pll_id < ALC5632_PLL_FR_MCLK || pll_id > ALC5632_PLL_FR_VBCLK) 704 switch (pll_id) {
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H A D | alc5623.c | 520 static int alc5623_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, argument 528 if (pll_id < ALC5623_PLL_FR_MCLK || pll_id > ALC5623_PLL_FR_BCK) 544 switch (pll_id) {
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/linux-master/drivers/mfd/ |
H A D | twl6040.c | 368 int twl6040_set_pll(struct twl6040 *twl6040, int pll_id, argument 380 if (pll_id != twl6040->pll) { 385 switch (pll_id) { 409 if (twl6040->pll == pll_id) 475 if (pll_id != twl6040->pll) 497 dev_err(twl6040->dev, "unknown pll id %d\n", pll_id); 503 twl6040->pll = pll_id;
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/linux-master/sound/soc/fsl/ |
H A D | fsl-asoc-card.c | 49 * @pll_id: PLL id for set_pll() 57 int pll_id; member in struct:codec_priv 210 if (codec_priv->pll_id >= 0 && codec_priv->fll_id >= 0) { 217 codec_priv->pll_id, 252 if (!priv->streams && codec_priv->pll_id >= 0 && codec_priv->fll_id >= 0) { 264 codec_priv->pll_id, 0, 0, 0); 626 priv->codec_priv.pll_id = -1; 661 priv->codec_priv.pll_id = WM8962_FLL; 666 priv->codec_priv.pll_id = WM8960_SYSCLK_AUTO; 700 priv->codec_priv.pll_id [all...] |
/linux-master/sound/soc/qcom/ |
H A D | sc7180.c | 161 int pll_id, pll_source, pll_in, pll_out, clk_id, ret; local 165 pll_id = 0; 171 pll_id = RT5682S_PLL2; 184 ret = snd_soc_dai_set_pll(codec_dai, pll_id, pll_source,
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/linux-master/drivers/gpu/drm/i915/display/ |
H A D | intel_pch_display.c | 495 enum intel_dpll_id pll_id; local 516 pll_id = (enum intel_dpll_id) pipe; 520 pll_id = DPLL_ID_PCH_PLL_B; 522 pll_id = DPLL_ID_PCH_PLL_A; 525 crtc_state->shared_dpll = intel_get_shared_dpll_by_id(dev_priv, pll_id);
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/linux-master/sound/soc/intel/boards/ |
H A D | sof_rt5682.c | 303 int pll_id, pll_source, pll_in, pll_out, clk_id, ret; local 359 pll_id = 0; /* not used in codec driver */ 363 pll_id = RT5682_PLL1; 367 pll_id = RT5682S_PLL2; 396 ret = snd_soc_dai_set_pll(codec_dai, pll_id, pll_source, pll_in,
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H A D | glk_rt5682_max98357a.c | 158 int pll_id, pll_source, clk_id, ret; local 161 pll_id = RT5682S_PLL2; 165 pll_id = RT5682_PLL1; 170 ret = snd_soc_dai_set_pll(codec_dai, pll_id, pll_source,
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/linux-master/drivers/video/fbdev/omap2/omapfb/dss/ |
H A D | dss.c | 166 void dss_ctrl_pll_enable(enum dss_pll_id pll_id, bool enable) argument 176 switch (pll_id) { 187 DSSERR("illegal DSS PLL ID %d\n", pll_id); 195 void dss_ctrl_pll_set_control_mux(enum dss_pll_id pll_id, argument 207 switch (pll_id) { 221 switch (pll_id) { 237 switch (pll_id) {
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/linux-master/drivers/clk/ |
H A D | clk-nomadik.c | 507 u32 pll_id; local 512 if (of_property_read_u32(np, "pll-id", &pll_id)) { 518 hw = pll_clk_register(NULL, clk_name, parent_name, pll_id);
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/linux-master/include/linux/mfd/ |
H A D | twl6040.h | 215 int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
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/linux-master/drivers/clk/at91/ |
H A D | sama7g5.c | 371 int pll_id; member in struct:__anon22::__anon23 560 int pll_id; member in struct:__anon26::__anon27 1119 u8 pll_id = sama7g5_mckx[i].ep[j].pll_id; local 1122 tmp_parent_hws[j] = sama7g5_plls[pll_id][pll_compid].hw; 1215 u8 pll_id = sama7g5_gck[i].pp[j].pll_id; local 1218 tmp_parent_hws[j] = sama7g5_plls[pll_id][pll_compid].hw;
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